llvm-6502/test/CodeGen
Stephen Lin 02f0799d84 CHECK-LABEL-ify tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188087 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-09 17:50:15 +00:00
..
AArch64 CHECK-LABEL-ify tests 2013-08-09 17:50:15 +00:00
ARM Make sure that if we're going to attempt to add a type to a DIE that 2013-08-08 07:40:37 +00:00
CPP
Generic
Hexagon Refactor isInTailCallPosition handling 2013-08-06 09:12:35 +00:00
Inputs Debug Info Verifier: verify SPs in llvm.dbg.sp. 2013-07-27 01:26:08 +00:00
Mips Create a pattern for the "trap" instruction. 2013-08-07 04:00:26 +00:00
MSP430 Use conventional syntax for branches. 2013-07-14 18:19:44 +00:00
NVPTX [NVPTX] Add missing patterns for i1 [s,u]int_to_fp 2013-08-06 14:13:34 +00:00
PowerPC initial draft of PPCMachObjectWriter.cpp 2013-08-08 20:14:40 +00:00
R600 R600/SI: Implement fp32<->fp64 conversions 2013-08-08 16:06:15 +00:00
SI
SPARC Allocate local registers in order for optimal coloring. 2013-07-25 18:35:14 +00:00
SystemZ [SystemZ] Optimize floating-point comparisons with zero 2013-08-07 11:10:06 +00:00
Thumb Debug Info: update testing cases to pass verifier. 2013-07-29 18:12:58 +00:00
Thumb2 Refactor AnalyzeBranch on ARM. The previous version did not always analyze 2013-07-19 23:52:47 +00:00
X86 CHECK-LABEL-ify tests 2013-08-09 17:50:15 +00:00
XCore XCore target: Fix Vararg handling 2013-08-01 08:29:44 +00:00