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add comments untabify git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30486 91177308-0d34-0410-b5e6-96231b3b80d8
70 lines
2.0 KiB
C++
70 lines
2.0 KiB
C++
//===-- ARMMul.cpp - Define TargetMachine for A5CRM -----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the "Instituto Nokia de Tecnologia" and
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// is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Modify the ARM multiplication instructions so that Rd and Rm are distinct
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//
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//===----------------------------------------------------------------------===//
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#include "ARM.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/Support/Compiler.h"
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using namespace llvm;
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namespace {
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class VISIBILITY_HIDDEN FixMul : public MachineFunctionPass {
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virtual bool runOnMachineFunction(MachineFunction &MF);
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};
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}
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FunctionPass *llvm::createARMFixMulPass() { return new FixMul(); }
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bool FixMul::runOnMachineFunction(MachineFunction &MF) {
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bool Changed = false;
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for (MachineFunction::iterator BB = MF.begin(), E = MF.end();
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BB != E; ++BB) {
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MachineBasicBlock &MBB = *BB;
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
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I != E; ++I) {
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MachineInstr *MI = I;
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if (MI->getOpcode() == ARM::MUL) {
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MachineOperand &RdOp = MI->getOperand(0);
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MachineOperand &RmOp = MI->getOperand(1);
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MachineOperand &RsOp = MI->getOperand(2);
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unsigned Rd = RdOp.getReg();
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unsigned Rm = RmOp.getReg();
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unsigned Rs = RsOp.getReg();
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if(Rd == Rm) {
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Changed = true;
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if (Rd != Rs) {
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//Rd and Rm must be distinct, but Rd can be equal to Rs.
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//Swap Rs and Rm
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RmOp.setReg(Rs);
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RsOp.setReg(Rm);
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} else {
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BuildMI(MBB, I, ARM::MOV, 3, ARM::R12).addReg(Rm).addImm(0)
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.addImm(ARMShift::LSL);
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RmOp.setReg(ARM::R12);
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}
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}
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}
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}
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}
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return Changed;
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}
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