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05b15fb075
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in the interest of not breaking things any more than they already are, I'm going to leave the constant alone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12043 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.7 KiB
C++
51 lines
1.7 KiB
C++
//===-- SparcV9TargetMachine.h - Define TargetMachine for SparcV9 ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the top-level UltraSPARC target machine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARC_TARGETMACHINE_H
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#define SPARC_TARGETMACHINE_H
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#include "llvm/Target/TargetFrameInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "SparcV9InstrInfo.h"
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#include "SparcV9Internals.h"
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#include "SparcV9RegInfo.h"
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#include "SparcV9FrameInfo.h"
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#include "SparcV9JITInfo.h"
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namespace llvm {
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class PassManager;
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class SparcV9TargetMachine : public TargetMachine {
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SparcV9InstrInfo instrInfo;
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SparcV9SchedInfo schedInfo;
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SparcV9RegInfo regInfo;
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SparcV9FrameInfo frameInfo;
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SparcV9JITInfo jitInfo;
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public:
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SparcV9TargetMachine(IntrinsicLowering *IL);
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virtual const TargetInstrInfo &getInstrInfo() const { return instrInfo; }
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virtual const TargetSchedInfo &getSchedInfo() const { return schedInfo; }
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virtual const TargetRegInfo &getRegInfo() const { return regInfo; }
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virtual const TargetFrameInfo &getFrameInfo() const { return frameInfo; }
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virtual TargetJITInfo *getJITInfo() { return &jitInfo; }
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virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
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virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE);
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};
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} // End llvm namespace
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#endif
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