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Bill Schmidt 03b9f9f2b6 [PowerPC 2/4] Little-endian adjustments for VSX insert/extract operations
For little endian, we need to make some straightforward adjustments in
the code expansions for scalar_to_vector and vector_extract of v2f64.
First, scalar_to_vector must place the scalar into vector element
zero.  However, our implementation of SUBREG_TO_REG will place it into
big-element vector element zero (high-order bits), and for little
endian we need it in the low-order bits.  The LE implementation splats
the high-order doubleword into the low-order doubleword.

Second, the meaning of (vector_extract x, 0) and (vector_extract x, 1)
must be reversed for similar reasons.

A new test is added that tests code generation for insertelement and
extractelement for both element 0 and element 1.  It is disabled in
this patch but enabled in patch 4/4, for reasons stated in the test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223788 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:43:32 +00:00
autoconf
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docs Add argument variable support to the debug info tutorial 2014-12-09 00:28:24 +00:00
examples Once more on the cmake build. nativecodegen->native on the dependencies. 2014-12-08 18:24:06 +00:00
include Add more pattern matchers for compares, instructions, and BinaryOperators. NFC. 2014-12-09 16:36:10 +00:00
lib [PowerPC 2/4] Little-endian adjustments for VSX insert/extract operations 2014-12-09 16:43:32 +00:00
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test [AVX512] Added VPBROADCAST{BWDQ} (Load with Broadcast Integer Data from General Purpose Register) encodings for AVX512-BW/VL subsets 2014-12-09 16:38:41 +00:00
tools Don't lookup an object symbol name in the module. 2014-12-09 16:13:59 +00:00
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