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c7b902e7fe
The current Intel Atom microarchitecture has a feature whereby when a function returns early then it is slightly faster to execute a sequence of NOP instructions to wait until the return address is ready, as opposed to simply stalling on the ret instruction until the return address is ready. When compiling for X86 Atom only, this patch will run a pass, called "X86PadShortFunction" which will add NOP instructions where less than four cycles elapse between function entry and return. It includes tests. This patch has been updated to address Nadav's review comments - Optimize only at >= O1 and don't do optimization if -Os is set - Stores MachineBasicBlock* instead of BBNum - Uses DenseMap instead of std::map - Fixes placement of braces Patch by Andy Zhang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171879 91177308-0d34-0410-b5e6-96231b3b80d8
172 lines
5.2 KiB
C++
172 lines
5.2 KiB
C++
//===-------- X86PadShortFunction.cpp - pad short functions -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the pass which will pad short functions to prevent
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// a stall if a function returns before the return address is ready. This
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// is needed for some Intel Atom processors.
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//
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//===----------------------------------------------------------------------===//
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#include <algorithm>
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#define DEBUG_TYPE "x86-pad-short-functions"
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#include "X86.h"
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#include "X86InstrInfo.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetInstrInfo.h"
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using namespace llvm;
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STATISTIC(NumBBsPadded, "Number of basic blocks padded");
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namespace {
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struct PadShortFunc : public MachineFunctionPass {
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static char ID;
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PadShortFunc() : MachineFunctionPass(ID)
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, Threshold(4), TM(0), TII(0) {}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual const char *getPassName() const {
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return "X86 Atom pad short functions";
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}
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private:
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void findReturns(MachineBasicBlock *MBB,
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unsigned int Cycles = 0);
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bool cyclesUntilReturn(MachineBasicBlock *MBB,
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unsigned int &Cycles,
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MachineBasicBlock::iterator *Location = 0);
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void addPadding(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &MBBI,
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unsigned int NOOPsToAdd);
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const unsigned int Threshold;
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DenseMap<MachineBasicBlock*, unsigned int> ReturnBBs;
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const TargetMachine *TM;
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const TargetInstrInfo *TII;
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};
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char PadShortFunc::ID = 0;
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}
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FunctionPass *llvm::createX86PadShortFunctions() {
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return new PadShortFunc();
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}
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/// runOnMachineFunction - Loop over all of the basic blocks, inserting
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/// NOOP instructions before early exits.
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bool PadShortFunc::runOnMachineFunction(MachineFunction &MF) {
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bool OptForSize = MF.getFunction()->getAttributes().
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hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
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if (OptForSize)
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return false;
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TM = &MF.getTarget();
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TII = TM->getInstrInfo();
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// Search through basic blocks and mark the ones that have early returns
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ReturnBBs.clear();
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findReturns(MF.begin());
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bool MadeChange = false;
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MachineBasicBlock::iterator ReturnLoc;
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MachineBasicBlock *MBB;
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unsigned int Cycles = 0;
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unsigned int BBCycles;
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// Pad the identified basic blocks with NOOPs
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for (DenseMap<MachineBasicBlock*, unsigned int>::iterator I = ReturnBBs.begin();
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I != ReturnBBs.end(); ++I) {
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MBB = I->first;
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Cycles = I->second;
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if (Cycles < Threshold) {
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if (!cyclesUntilReturn(MBB, BBCycles, &ReturnLoc))
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continue;
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addPadding(MBB, ReturnLoc, Threshold - Cycles);
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NumBBsPadded++;
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MadeChange = true;
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}
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}
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return MadeChange;
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}
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/// findReturn - Starting at MBB, follow control flow and add all
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/// basic blocks that contain a return to ReturnBBs.
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void PadShortFunc::findReturns(MachineBasicBlock *MBB, unsigned int Cycles) {
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// If this BB has a return, note how many cycles it takes to get there.
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bool hasReturn = cyclesUntilReturn(MBB, Cycles);
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if (Cycles >= Threshold)
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return;
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if (hasReturn) {
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ReturnBBs[MBB] = std::max(ReturnBBs[MBB], Cycles);
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return;
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}
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// Follow branches in BB and look for returns
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for (MachineBasicBlock::succ_iterator I = MBB->succ_begin();
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I != MBB->succ_end(); ++I) {
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findReturns(*I, Cycles);
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}
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}
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/// cyclesUntilReturn - if the MBB has a return instruction, set Location
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/// to the instruction and return true. Return false otherwise.
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/// Cycles will be incremented by the number of cycles taken to reach the
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/// return or the end of the BB, whichever occurs first.
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bool PadShortFunc::cyclesUntilReturn(MachineBasicBlock *MBB,
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unsigned int &Cycles,
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MachineBasicBlock::iterator *Location) {
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for (MachineBasicBlock::iterator MBBI = MBB->begin();
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MBBI != MBB->end(); ++MBBI) {
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MachineInstr *MI = MBBI;
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// Mark basic blocks with a return instruction. Calls to other
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// functions do not count because the called function will be padded,
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// if necessary.
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if (MI->isReturn() && !MI->isCall()) {
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if (Location)
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*Location = MBBI;
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return true;
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}
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Cycles += TII->getInstrLatency(TM->getInstrItineraryData(), MI);
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}
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return false;
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}
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/// addPadding - Add the given number of NOOP instructions to the function
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/// just prior to the return at MBBI
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void PadShortFunc::addPadding(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &MBBI,
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unsigned int NOOPsToAdd) {
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DebugLoc DL = MBBI->getDebugLoc();
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while (NOOPsToAdd-- > 0) {
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BuildMI(*MBB, MBBI, DL, TII->get(X86::NOOP));
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BuildMI(*MBB, MBBI, DL, TII->get(X86::NOOP));
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}
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}
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