Evan Cheng 92e3916c3b Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends ... was lowering them to sext / uxt + mul instructions. Unfortunately the optimization passes may hoist the extensions out of the loop and separate them. When that happens, the long multiplication instructions can be broken into several scalar instructions, causing significant performance issue. Note the vmla and vmls intrinsics are not added back. Frontend will codegen them as intrinsics vmull* + add / sub. Also note the isel optimizations for catching mul + sext / zext are not changed either. First part of rdar://8832507, rdar://9203134 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128502 91177308-0d34-0410-b5e6-96231b3b80d8		2011-03-29 23:06:19 +00:00
..
Alpha
ARM	Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends	2011-03-29 23:06:19 +00:00
Blackfin	Be nice to Xcore and the XMOS assembler and avoid quoting section names	2011-03-04 20:03:14 +00:00
CBackend
CellSPU	Roll r127459 back in:	2011-03-11 21:52:04 +00:00
CPP
Generic	Make this test x86 specific because the ARM backend can't handle it.	2011-02-28 12:30:47 +00:00
MBlaze	fix visitShift to properly zero extend the shift amount if the provided operand	2011-02-13 09:02:52 +00:00
Mips	Revert "Re-enable test and hope to silence the buildbots", still broken.	2011-03-09 22:48:46 +00:00
MSP430	Enhance ComputeMaskedBits to know that aligned frameindexes	2011-02-13 22:25:43 +00:00
PowerPC	Fix mistyped CHECK lines.	2011-03-09 22:07:31 +00:00
PTX	ptx: add analyze/insert/remove branch	2011-03-22 14:12:00 +00:00
SPARC	Generate correct Sparc32 ABI compliant code for functions that return a struct.	2011-02-21 03:42:44 +00:00
SystemZ
Thumb	Roll r127459 back in:	2011-03-11 21:52:04 +00:00
Thumb2	Fix the bfi handling for or (and a mask) (and b mask). We need the two	2011-03-26 01:21:03 +00:00
X86	Reduce test case.	2011-03-29 02:18:54 +00:00
XCore	Add XCore intrinsic for setpsc.	2011-03-17 18:42:05 +00:00