llvm-6502/lib/CodeGen/SelectionDAG
Evan Cheng 03fa6ea402 - When performing pre-/post- indexed load/store transformation, do not worry
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31544 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 08:30:28 +00:00
..
DAGCombiner.cpp - When performing pre-/post- indexed load/store transformation, do not worry 2006-11-08 08:30:28 +00:00
LegalizeDAG.cpp Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll. 2006-11-07 04:11:44 +00:00
Makefile
ScheduleDAG.cpp
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp Remove dead code; added a missing null ptr check. 2006-11-06 21:33:46 +00:00
ScheduleDAGSimple.cpp
SelectionDAG.cpp Unbreak VC++ build. 2006-11-05 19:31:28 +00:00
SelectionDAGISel.cpp For PR950: 2006-11-08 06:47:33 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp