llvm-6502/test/CodeGen
David Sehr 693c37aa86 Two changes relevant to LEA and x32:
1) allows the use of RIP-relative addressing in 32-bit LEA instructions under
   x86-64 (ILP32 and LP64)
2) separates the size of address registers in 64-bit LEA instructions from
   control by ILP32/LP64.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174208 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01 19:28:09 +00:00
..
AArch64 Add explicit triples to AArch64 tests 2013-02-01 11:40:47 +00:00
ARM Add a special ARM trap encoding for NaCl. 2013-01-30 16:30:19 +00:00
CPP
Generic
Hexagon Hexagon: Test case to confirm generation of indexed loads with zero offset. 2013-02-01 16:40:06 +00:00
MBlaze
Mips [mips] Test case for r173862. 2013-01-30 00:28:15 +00:00
MSP430
NVPTX
PowerPC PPC QPX requires a 32-byte aligned stack 2013-01-30 23:43:27 +00:00
R600 R600: Fold clamp, neg, abs 2013-01-31 22:11:54 +00:00
SI
SPARC
Thumb
Thumb2 FileCheck-ify some grep tests 2013-01-25 22:11:46 +00:00
X86 Two changes relevant to LEA and x32: 2013-02-01 19:28:09 +00:00
XCore