llvm-6502/test/MC/Disassembler
Gordon Keiser ce88835110 Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when the upper bit is set.
They should always be zero-extended, not sign extended.  Added test case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178275 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28 19:22:28 +00:00
..
AArch64 AArch64: implement GICv3 system registers 2013-03-28 14:30:46 +00:00
ARM Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when the upper bit is set. 2013-03-28 19:22:28 +00:00
MBlaze
Mips This is a resubmittal. For some reason it broke the bots yesterday 2013-01-17 00:28:20 +00:00
X86 x86 -- disassemble the REP/REPNE prefix when needed 2013-03-25 18:59:38 +00:00
XCore [XCore] Add missing 2r instructions. 2013-02-17 22:38:05 +00:00