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042888db2b
Stop depending on the LiveIntervalUnions in RegAllocBase, they are about to be removed. The changes are mostly replacing register alias iterators with regunit iterators, and querying LiveRegMatrix instrad of RegAllocBase. InterferenceCache is converted to work with per-regunit LiveIntervalUnions, and it checks fixed regunit interference separately, using the fixed live intervals provided by LiveIntervalAnalysis. The local splitting helper calcGapWeights() is also considering fixed regunit interference which is kept on the side now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158867 91177308-0d34-0410-b5e6-96231b3b80d8
149 lines
5.6 KiB
C++
149 lines
5.6 KiB
C++
//===-- LiveRegMatrix.h - Track register interference ---------*- C++ -*---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// The LiveRegMatrix analysis pass keeps track of virtual register interference
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// along two dimensions: Slot indexes and register units. The matrix is used by
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// register allocators to ensure that no interfering virtual registers get
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// assigned to overlapping physical registers.
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//
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// Register units are defined in MCRegisterInfo.h, they represent the smallest
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// unit of interference when dealing with overlapping physical registers. The
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// LiveRegMatrix is represented as a LiveIntervalUnion per register unit. When
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// a virtual register is assigned to a physicval register, the live range for
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// the virtual register is inserted into the LiveIntervalUnion for each regunit
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// in the physreg.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LIVEREGMATRIX_H
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#define LLVM_CODEGEN_LIVEREGMATRIX_H
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#include "LiveIntervalUnion.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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namespace llvm {
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class LiveInterval;
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class LiveIntervalAnalysis;
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class MachineRegisterInfo;
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class TargetRegisterInfo;
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class VirtRegMap;
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class LiveRegMatrix : public MachineFunctionPass {
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const TargetRegisterInfo *TRI;
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MachineRegisterInfo *MRI;
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LiveIntervals *LIS;
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VirtRegMap *VRM;
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// UserTag changes whenever virtual registers have been modified.
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unsigned UserTag;
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// The matrix is represented as a LiveIntervalUnion per register unit.
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LiveIntervalUnion::Allocator LIUAlloc;
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LiveIntervalUnion::Array Matrix;
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// Cached queries per register unit.
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OwningArrayPtr<LiveIntervalUnion::Query> Queries;
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// Cached register mask interference info.
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unsigned RegMaskTag;
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unsigned RegMaskVirtReg;
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BitVector RegMaskUsable;
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// MachineFunctionPass boilerplate.
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virtual void getAnalysisUsage(AnalysisUsage&) const;
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virtual bool runOnMachineFunction(MachineFunction&);
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virtual void releaseMemory();
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public:
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static char ID;
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LiveRegMatrix();
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//===--------------------------------------------------------------------===//
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// High-level interface.
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//===--------------------------------------------------------------------===//
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//
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// Check for interference before assigning virtual registers to physical
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// registers.
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//
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/// Invalidate cached interference queries after modifying virtual register
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/// live ranges. Interference checks may return stale information unless
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/// caches are invalidated.
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void invalidateVirtRegs() { ++UserTag; }
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enum InterferenceKind {
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/// No interference, go ahead and assign.
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IK_Free = 0,
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/// Virtual register interference. There are interfering virtual registers
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/// assigned to PhysReg or its aliases. This interference could be resolved
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/// by unassigning those other virtual registers.
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IK_VirtReg,
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/// Register unit interference. A fixed live range is in the way, typically
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/// argument registers for a call. This can't be resolved by unassigning
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/// other virtual registers.
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IK_RegUnit,
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/// RegMask interference. The live range is crossing an instruction with a
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/// regmask operand that doesn't preserve PhysReg. This typically means
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/// VirtReg is live across a call, and PhysReg isn't call-preserved.
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IK_RegMask
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};
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/// Check for interference before assigning VirtReg to PhysReg.
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/// If this function returns IK_Free, it is legal to assign(VirtReg, PhysReg).
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/// When there is more than one kind of interference, the InterferenceKind
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/// with the highest enum value is returned.
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InterferenceKind checkInterference(LiveInterval &VirtReg, unsigned PhysReg);
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/// Assign VirtReg to PhysReg.
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/// This will mark VirtReg's live range as occupied in the LiveRegMatrix and
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/// update VirtRegMap. The live range is expected to be available in PhysReg.
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void assign(LiveInterval &VirtReg, unsigned PhysReg);
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/// Unassign VirtReg from its PhysReg.
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/// Assuming that VirtReg was previously assigned to a PhysReg, this undoes
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/// the assignment and updates VirtRegMap accordingly.
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void unassign(LiveInterval &VirtReg);
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//===--------------------------------------------------------------------===//
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// Low-level interface.
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//===--------------------------------------------------------------------===//
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//
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// Provide access to the underlying LiveIntervalUnions.
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//
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/// Check for regmask interference only.
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/// Return true if VirtReg crosses a regmask operand that clobbers PhysReg.
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/// If PhysReg is null, check if VirtReg crosses any regmask operands.
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bool checkRegMaskInterference(LiveInterval &VirtReg, unsigned PhysReg = 0);
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/// Check for regunit interference only.
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/// Return true if VirtReg overlaps a fixed assignment of one of PhysRegs's
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/// register units.
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bool checkRegUnitInterference(LiveInterval &VirtReg, unsigned PhysReg);
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/// Query a line of the assigned virtual register matrix directly.
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/// Use MCRegUnitIterator to enumerate all regunits in the desired PhysReg.
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/// This returns a reference to an internal Query data structure that is only
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/// valid until the next query() call.
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LiveIntervalUnion::Query &query(LiveInterval &VirtReg, unsigned RegUnit);
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/// Directly access the live interval unions per regunit.
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/// This returns an array indexed by the regunit number.
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LiveIntervalUnion *getLiveUnions() { return &Matrix[0]; }
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};
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} // end namespace llvm
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#endif // LLVM_CODEGEN_LIVEREGMATRIX_H
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