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https://github.com/c64scene-ar/llvm-6502.git
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68fe665b9a
physical register $r1 to $r0. GNU disassembler recognizes an "or" instruction as a "move", and this change makes the disassembled code easier to read. Original patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170655 91177308-0d34-0410-b5e6-96231b3b80d8
28 lines
548 B
LLVM
28 lines
548 B
LLVM
; RUN: llc -march=mipsel -disable-mips-delay-filler < %s | FileCheck %s
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@g = external global i32
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; CHECK: or $gp
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; CHECK: jalr $25
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; CHECK: nop
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; CHECK-NOT: or $gp
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; CHECK: jalr $25
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define void @f0() nounwind {
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entry:
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tail call void @externalFunc() nounwind
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tail call fastcc void @internalFunc()
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ret void
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}
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declare void @externalFunc()
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define internal fastcc void @internalFunc() nounwind noinline {
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entry:
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%0 = load i32* @g, align 4
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%inc = add nsw i32 %0, 1
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store i32 %inc, i32* @g, align 4
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ret void
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}
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