llvm-6502/test/MC
Jack Carter 04376ebe9f The Mips standalone assembler aliased instruction support.
The assembler can alias one instruction into another based
on the operands. For example the jump instruction "J" takes
and immediate operand, but if the operand is a register the
assembler will change it into a jump register "JR" instruction.

These changes are in the instruction td file.

Test cases included

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163368 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07 01:42:38 +00:00
..
ARM Support fpv4 for ARM Cortex-M4. 2012-08-02 08:35:55 +00:00
AsmParser Fix macros arguments with an underscore, dot or dollar in them. This is based 2012-08-21 18:29:30 +00:00
COFF llvm/test/MC/COFF/seh.s: Fixup corresponding to r161487. 2012-08-08 13:27:04 +00:00
Disassembler Diagnose invalid alignments on duplicating VLDn instructions. 2012-09-06 15:27:12 +00:00
ELF Give this test an explicit triple. 2012-08-12 08:21:27 +00:00
MachO Add .pushsection', .popsection', and `.previous' directives to Darwin ASM. 2012-08-08 06:30:30 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips The Mips standalone assembler aliased instruction support. 2012-09-07 01:42:38 +00:00
X86 X86: Fix encoding of 'movd %xmm0, %rax' 2012-08-31 00:30:30 +00:00