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745fff806d
IMAGE_REL_ARM_MOV32T relocations require that the movw/movt pair-wise relocation is not split up and reordered. When expanding the mov32imm pseudo-instruction, create a bundle if the machine operand is referencing an address. This helps ensure that the relocatable address load is not reordered by subsequent passes. Unfortunately, this only partially handles the case as the Constant Island Pass occurs after the instructions are unbundled and does not properly handle bundles. That is a more fundamental issue with the pass itself and beyond the scope of this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207608 91177308-0d34-0410-b5e6-96231b3b80d8
28 lines
818 B
LLVM
28 lines
818 B
LLVM
; RUN: llc -mtriple=thumbv7-windows -o - %s \
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; RUN: | FileCheck %s -check-prefix CHECK-WINDOWS
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; RUN: llc -mtriple=thumbv7-eabi -o - %s \
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; RUN: | FileCheck %s -check-prefix CHECK-EABI
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@i = common global i32 0, align 4
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@j = common global i32 0, align 4
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; Function Attrs: nounwind optsize readonly
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define i32 @relocation(i32 %j, i32 %k) {
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entry:
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%0 = load i32* @i, align 4
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%1 = load i32* @j, align 4
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%add = add nsw i32 %1, %0
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ret i32 %add
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}
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; CHECK-WINDOWS: movw r[[i:[0-4]]], :lower16:i
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; CHECK-WINDOWS-NEXT: movt r[[i]], :upper16:i
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; CHECK-WINDOWS: movw r[[j:[0-4]]], :lower16:j
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; CHECK-WINDOWS-NEXT: movt r[[j]], :upper16:j
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; CHECK-EABI: movw r[[i:[0-4]]], :lower16:i
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; CHECK-EABI: movw r[[j:[0-4]]], :lower16:j
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; CHECK-EABI-NEXT: movt r[[i]], :upper16:i
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; CHECK-EABI-NEXT: movt r[[j]], :upper16:j
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