llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-30 04:56:49 +00:00

History

Dale Johannesen b300d2aa3e Get rid of the last non-DebugLoc versions of getNode! Many targets build placeholder nodes for special operands, e.g. GlobalBaseReg on X86 and PPC for the PIC base. There's no sensible way to associate debug info with these. I've left them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. I'm not too happy about this but don't see a good improvement; I considered adding a getPseudoOperand or something, but it seems to me that'll just make it harder to read. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8		2009-02-07 00:55:49 +00:00
..
AsmPrinter	Fix Alpha test and support for private linkage.	2009-01-15 21:51:46 +00:00
Alpha.h	Tidy up #includes, deleting a bunch of unnecessary #includes.	2009-01-05 17:59:02 +00:00
Alpha.td	Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files.	2008-11-24 07:34:46 +00:00
AlphaBranchSelector.cpp	Tidy up several unbeseeming casts from pointer to intptr_t.	2008-09-04 17:05:41 +00:00
AlphaCodeEmitter.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaInstrFormats.td	Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.	2008-12-03 18:15:48 +00:00
AlphaInstrInfo.cpp	Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.	2009-01-20 19:12:24 +00:00
AlphaInstrInfo.h	Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.	2009-01-20 19:12:24 +00:00
AlphaInstrInfo.td	silence warning when asserts disabled.	2008-12-14 21:37:33 +00:00
AlphaISelDAGToDAG.cpp	Remove non-DebugLoc forms of CopyToReg and CopyFromReg.	2009-02-04 23:02:30 +00:00
AlphaISelLowering.cpp	Get rid of the last non-DebugLoc versions of getNode!	2009-02-07 00:55:49 +00:00
AlphaISelLowering.h	Make LowerCallTo and LowerArguments take a DebugLoc	2009-01-30 23:10:59 +00:00
AlphaJITInfo.cpp	Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr.	2008-11-08 08:02:53 +00:00
AlphaJITInfo.h
AlphaLLRP.cpp	Tidy up several unbeseeming casts from pointer to intptr_t.	2008-09-04 17:05:41 +00:00
AlphaRegisterInfo.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp	Refactor various TargetAsmInfo subclasses' TargetMachine members away	2008-11-03 18:22:42 +00:00
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp	Adds extern "C" ints to the .cpp files that use RegisterTarget, as	2008-11-15 21:36:30 +00:00
AlphaTargetMachine.h
CMakeLists.txt	CMake: corrected split of Alpha and Sparc AsmPrinters.	2008-11-11 17:10:13 +00:00
Makefile	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html