mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-02 11:30:10 +00:00
0481d29d49
current IR-level pass. The old SjLj EH pass has some problems, especially with the new EH model. Most significantly, it violates some of the new restrictions the new model has. For instance, the 'dispatch' table wants to jump to the landing pad, but we cannot allow that because only an invoke's unwind edge can jump to a landing pad. This requires us to mangle the code something awful. In addition, we need to keep the now dead landingpad instructions around instead of CSE'ing them because the DWARF emitter uses that information (they are dead because no control flow edge will execute them - the control flow edge from an invoke's unwind is superceded by the edge coming from the dispatch). Basically, this pass belongs not at the IR level where SSA is king, but at the code-gen level, where we have more flexibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140646 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.7 KiB
C++
56 lines
1.7 KiB
C++
//===-- ARM.h - Top-level interface for ARM representation---- --*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file contains the entry points for global functions defined in the LLVM
|
|
// ARM back-end.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef TARGET_ARM_H
|
|
#define TARGET_ARM_H
|
|
|
|
#include "MCTargetDesc/ARMBaseInfo.h"
|
|
#include "MCTargetDesc/ARMMCTargetDesc.h"
|
|
#include "llvm/Support/DataTypes.h"
|
|
#include "llvm/Support/ErrorHandling.h"
|
|
#include "llvm/Target/TargetMachine.h"
|
|
#include <cassert>
|
|
|
|
namespace llvm {
|
|
|
|
class ARMAsmPrinter;
|
|
class ARMBaseTargetMachine;
|
|
class FunctionPass;
|
|
class JITCodeEmitter;
|
|
class MachineInstr;
|
|
class MCInst;
|
|
|
|
FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
|
|
CodeGenOpt::Level OptLevel);
|
|
|
|
FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
|
|
JITCodeEmitter &JCE);
|
|
|
|
FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
|
|
FunctionPass *createARMExpandPseudoPass();
|
|
FunctionPass *createARMGlobalMergePass(const TargetLowering* tli);
|
|
FunctionPass *createARMConstantIslandPass();
|
|
FunctionPass *createARMSjLjLoweringPass();
|
|
FunctionPass *createNEONMoveFixPass();
|
|
FunctionPass *createMLxExpansionPass();
|
|
FunctionPass *createThumb2ITBlockPass();
|
|
FunctionPass *createThumb2SizeReductionPass();
|
|
|
|
void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
|
|
ARMAsmPrinter &AP);
|
|
|
|
} // end namespace llvm;
|
|
|
|
#endif
|