mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
3a36996b73
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239690 91177308-0d34-0410-b5e6-96231b3b80d8
75 lines
2.3 KiB
LLVM
75 lines
2.3 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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;
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; Bug 6840. Use absolute+index addressing.
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@ga = common global [1024 x i8] zeroinitializer, align 8
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@gb = common global [1024 x i8] zeroinitializer, align 8
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; CHECK: memub(r{{[0-9]+}}{{ *}}<<{{ *}}#0{{ *}}+{{ *}}##ga)
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define zeroext i8 @lf2(i32 %i) nounwind readonly {
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entry:
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%arrayidx = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %i
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%0 = load i8, i8* %arrayidx, align 1
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ret i8 %0
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}
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; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#0{{ *}}+{{ *}}##gb)
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define signext i8 @lf2s(i32 %i) nounwind readonly {
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entry:
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%arrayidx = getelementptr inbounds [1024 x i8], [1024 x i8]* @gb, i32 0, i32 %i
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%0 = load i8, i8* %arrayidx, align 1
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ret i8 %0
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}
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; CHECK: memub(r{{[0-9]+}}{{ *}}<<{{ *}}#2{{ *}}+{{ *}}##ga)
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define zeroext i8 @lf3(i32 %i) nounwind readonly {
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entry:
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%mul = shl nsw i32 %i, 2
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%arrayidx = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %mul
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%0 = load i8, i8* %arrayidx, align 1
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ret i8 %0
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}
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; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#2{{ *}}+{{ *}}##gb)
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define signext i8 @lf3s(i32 %i) nounwind readonly {
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entry:
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%mul = shl nsw i32 %i, 2
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%arrayidx = getelementptr inbounds [1024 x i8], [1024 x i8]* @gb, i32 0, i32 %mul
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%0 = load i8, i8* %arrayidx, align 1
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ret i8 %0
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}
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; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#0{{ *}}+{{ *}}##ga)
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define void @sf4(i32 %i, i8 zeroext %j) nounwind {
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entry:
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%arrayidx = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %i
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store i8 %j, i8* %arrayidx, align 1
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ret void
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}
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; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#0{{ *}}+{{ *}}##gb)
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define void @sf4s(i32 %i, i8 signext %j) nounwind {
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entry:
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%arrayidx = getelementptr inbounds [1024 x i8], [1024 x i8]* @gb, i32 0, i32 %i
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store i8 %j, i8* %arrayidx, align 1
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ret void
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}
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; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#2{{ *}}+{{ *}}##ga)
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define void @sf5(i32 %i, i8 zeroext %j) nounwind {
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entry:
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%mul = shl nsw i32 %i, 2
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%arrayidx = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %mul
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store i8 %j, i8* %arrayidx, align 1
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ret void
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}
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; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#2{{ *}}+{{ *}}##gb)
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define void @sf5s(i32 %i, i8 signext %j) nounwind {
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entry:
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%mul = shl nsw i32 %i, 2
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%arrayidx = getelementptr inbounds [1024 x i8], [1024 x i8]* @gb, i32 0, i32 %mul
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store i8 %j, i8* %arrayidx, align 1
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ret void
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}
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