llvm-6502/test/CodeGen
Tim Northover 04a359f768 AArch64/ARM64: optimise vector selects & enable test
When performing a scalar comparison that feeds into a vector select,
it's actually better to do the comparison on the vector side: the
scalar route would be "CMP -> CSEL -> DUP", the vector is "CM -> DUP"
since the vector comparisons are all mask based.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208210 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-07 14:10:27 +00:00
..
AArch64 AArch64/ARM64: optimise vector selects & enable test 2014-05-07 14:10:27 +00:00
ARM Allow using normal .eh_frame based unwinding on ARM. Use the same 2014-05-07 07:49:34 +00:00
ARM64 AArch64/ARM64: optimise vector selects & enable test 2014-05-07 14:10:27 +00:00
CPP
Generic
Hexagon
Inputs
Mips Add basic functionality for assignment of ints. 2014-05-01 20:39:21 +00:00
MSP430
NVPTX
PowerPC
R600 R600: Expand i64 ISD:SUB 2014-05-05 21:47:15 +00:00
SPARC Remove the -disable-cfi option. 2014-05-05 17:33:26 +00:00
SystemZ
Thumb
Thumb2
X86 [X86] Improve the lowering of BITCAST dag nodes from type f64 to type v2i32 (and vice versa). 2014-05-06 17:09:03 +00:00
XCore