Tom Stellard 04c559569f R600: Simplify handling of private address space ... The AMDGPUIndirectAddressing pass was previously responsible for lowering private loads and stores to indirect addressing instructions. However, this pass was buggy and way too complicated. The only advantage it had over the new simplified code was that it saved one instruction per direct write to private memory. This optimization likely has a minimal impact on performance, and we may be able to duplicate it using some other transformation. For the private address space, we now: 1. Lower private loads/store to Register(Load|Store) instructions 2. Reserve part of the register file as 'private memory' 3. After regalloc lower the Register(Load|Store) instructions to MOV instructions that use indirect addressing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193179 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-22 18:19:10 +00:00
..
InstPrinter	R600: improve dump of S_WAITCNT	2013-10-13 17:56:28 +00:00
MCTargetDesc	Add a MCTargetStreamer interface.	2013-10-08 13:08:17 +00:00
TargetInfo
AMDGPU.h	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
AMDGPU.td	R600: Use StructurizeCFGPass for non SI targets	2013-10-10 17:11:12 +00:00
AMDGPUAsmPrinter.cpp	R600: Store disassembly in a special ELF section when feature +DumpCode is enabled.	2013-10-12 05:02:51 +00:00
AMDGPUAsmPrinter.h	R600: Store disassembly in a special ELF section when feature +DumpCode is enabled.	2013-10-12 05:02:51 +00:00
AMDGPUCallingConv.td	R600/SI: Support byval arguments	2013-10-13 17:56:16 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
AMDGPUInstrInfo.h	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td	R600: Fix handling of NAN in comparison instructions	2013-09-28 02:50:50 +00:00
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp	ISelDAG: spot chain cycles involving MachineNodes	2013-09-22 08:21:56 +00:00
AMDGPUISelLowering.cpp
AMDGPUISelLowering.h
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp	R600: Store disassembly in a special ELF section when feature +DumpCode is enabled.	2013-10-12 05:02:51 +00:00
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp	R600: Use StructurizeCFGPass for non SI targets	2013-10-10 17:11:12 +00:00
AMDGPUSubtarget.h	R600: Use StructurizeCFGPass for non SI targets	2013-10-10 17:11:12 +00:00
AMDGPUTargetMachine.cpp	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDILBase.td
AMDILCFGStructurizer.cpp	R600: Remove \ at EOL from ascii art comments.	2013-10-18 14:12:50 +00:00
AMDILInstrInfo.td	R600: Enable -verify-machineinstrs in some tests.	2013-10-01 19:32:38 +00:00
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelLowering.cpp
AMDILRegisterInfo.td
CMakeLists.txt	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
LLVMBuild.txt
Makefile
Processors.td
R600ClauseMergePass.cpp	R600: add a pass that merges clauses.	2013-10-01 19:32:58 +00:00
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp	R600: Use StructurizeCFGPass for non SI targets	2013-10-10 17:11:12 +00:00
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td	R600: Use SchedModel enum for is{Trans,Vector}Only functions	2013-09-04 19:53:30 +00:00
R600InstrInfo.cpp	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
R600InstrInfo.h	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
R600Instructions.td	R600: Clear the VPM bit of export instructions.	2013-10-13 17:55:57 +00:00
R600Intrinsics.td	R600: Add a ldptr intrinsic to support MSAA.	2013-10-02 16:00:33 +00:00
R600ISelLowering.cpp	R600: Use masked read sel for texture instructions	2013-10-13 17:56:10 +00:00
R600ISelLowering.h	R600: Move fabs/fneg/sel folding logic into PostProcessIsel	2013-09-12 23:44:44 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
R600RegisterInfo.cpp	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
R600RegisterInfo.h
R600RegisterInfo.td	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
SIAnnotateControlFlow.cpp
SIDefines.h	R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*	2013-10-10 17:11:55 +00:00
SIFixSGPRCopies.cpp
SIInsertWaits.cpp
SIInstrFormats.td	R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*	2013-10-10 17:11:55 +00:00
SIInstrInfo.cpp	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
SIInstrInfo.h	R600: Simplify handling of private address space	2013-10-22 18:19:10 +00:00
SIInstrInfo.td	R600/SI: Define a separate MIMG instruction for each possible output value type	2013-10-10 17:11:24 +00:00
SIInstructions.td	Fix typo	2013-10-15 23:44:48 +00:00
SIIntrinsics.td
SIISelLowering.cpp	R600/SI: Remove some leftover MI dump call	2013-10-15 22:48:51 +00:00
SIISelLowering.h
SILowerControlFlow.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp	R600/SI: Mark the EXEC register as reserved	2013-10-10 17:11:19 +00:00
SIRegisterInfo.h
SIRegisterInfo.td	R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*	2013-10-10 17:11:55 +00:00
SISchedule.td
SITypeRewriter.cpp