llvm-6502/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
Dan Gohman ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00

15 lines
434 B
LLVM

; RUN: llvm-as < %s | llc -march=x86
; PR3686
; rdar://6661799
define i32 @x(i32 %y) nounwind readnone {
entry:
%tmp14 = zext i32 %y to i80 ; <i80> [#uses=1]
%tmp15 = bitcast i80 %tmp14 to x86_fp80 ; <x86_fp80> [#uses=1]
%add = fadd x86_fp80 %tmp15, 0xK3FFF8000000000000000 ; <x86_fp80> [#uses=1]
%tmp11 = bitcast x86_fp80 %add to i80 ; <i80> [#uses=1]
%tmp10 = trunc i80 %tmp11 to i32 ; <i32> [#uses=1]
ret i32 %tmp10
}