Jim Grosbach 051fee0312 Enable ARM mode VDUP(scalar) tests. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141447 91177308-0d34-0410-b5e6-96231b3b80d8		2011-10-07 23:57:03 +00:00
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ARM	Enable ARM mode VDUP(scalar) tests.	2011-10-07 23:57:03 +00:00
AsmParser	Added regression test for bug #10869.	2011-09-19 07:48:08 +00:00
COFF	Add the suffix to the Win64 EH data sections' names if given. Add a test for	2011-05-27 21:38:47 +00:00
Disassembler	Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE.	2011-10-07 07:02:24 +00:00
ELF	Fix the bitwidth of the remaining fields.	2011-08-04 17:00:11 +00:00
MachO	Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom	2011-09-08 20:53:44 +00:00
MBlaze	Teach the MBlaze asm parser how to parse special purpose register names.	2010-12-20 20:43:24 +00:00
X86	Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine.	2011-10-07 05:35:38 +00:00