Quentin Colombet 05a3f9120a [AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW. ... Teach the load store optimizer how to sign extend a result of a load pair when it helps creating more pairs. The rational is that loads are more expensive than sign extensions, so if we gather some in one instruction this is better! <rdar://problem/20072968> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231527 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-06 22:42:10 +00:00
..
AArch64	[AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW.	2015-03-06 22:42:10 +00:00
ARM	DAGCombiner: Canonicalize select(and/or,x,y) depending on target.	2015-03-06 19:49:10 +00:00
BPF
CPP
Generic	DebugInfo: Move new hierarchy into place	2015-03-03 17:24:31 +00:00
Hexagon	DebugInfo: Move new hierarchy into place	2015-03-03 17:24:31 +00:00
Inputs	DebugInfo: Move new hierarchy into place	2015-03-03 17:24:31 +00:00
Mips	[mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator	2015-03-04 15:47:42 +00:00
MSP430
NVPTX
PowerPC	Use the correct func begin symbol in all places in ppc.	2015-03-05 19:47:50 +00:00
R600	DAGCombiner: Canonicalize select(and/or,x,y) depending on target.	2015-03-06 19:49:10 +00:00
SPARC	Use the vanilla func_end symbol for .size.	2015-03-04 01:35:23 +00:00
SystemZ	Change SystemZ large tests to use the existing long_tests property	2015-03-02 19:34:11 +00:00
Thumb	DebugInfo: Move new hierarchy into place	2015-03-03 17:24:31 +00:00
Thumb2	Make DataLayout Non-Optional in the Module	2015-03-04 18:43:29 +00:00
WinEH	Replace llvm.frameallocate with llvm.frameescape	2015-03-05 18:26:34 +00:00
X86	fixed to test features, not CPUs	2015-03-06 21:50:42 +00:00
XCore	DebugInfo: Move new hierarchy into place	2015-03-03 17:24:31 +00:00