mirror of
https://github.com/c64scene-ar/llvm-6502.git
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ef63c9a9b6
This fixes PR8114 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113894 91177308-0d34-0410-b5e6-96231b3b80d8
213 lines
3.9 KiB
ArmAsm
213 lines
3.9 KiB
ArmAsm
// RUN: llvm-mc -triple x86_64-unknown-unknown %s > %t 2> %t.err
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// RUN: FileCheck < %t %s
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// RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s
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// CHECK: subb %al, %al
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subb %al, %al
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// CHECK: addl $24, %eax
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addl $24, %eax
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// CHECK: movl %eax, 10(%ebp)
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movl %eax, 10(%ebp)
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// CHECK: movl %eax, 10(%ebp,%ebx)
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movl %eax, 10(%ebp, %ebx)
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// CHECK: movl %eax, 10(%ebp,%ebx,4)
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movl %eax, 10(%ebp, %ebx, 4)
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// CHECK: movl %eax, 10(,%ebx,4)
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movl %eax, 10(, %ebx, 4)
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// CHECK: movl 0, %eax
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movl 0, %eax
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// CHECK: movl $0, %eax
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movl $0, %eax
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// CHECK: ret
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ret
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// FIXME: Check that this matches SUB32ri8
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// CHECK: subl $1, %eax
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subl $1, %eax
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// FIXME: Check that this matches SUB32ri8
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// CHECK: subl $-1, %eax
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subl $-1, %eax
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// FIXME: Check that this matches SUB32ri
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// CHECK: subl $256, %eax
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subl $256, %eax
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// FIXME: Check that this matches XOR64ri8
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// CHECK: xorq $1, %rax
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xorq $1, %rax
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// FIXME: Check that this matches XOR64ri32
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// CHECK: xorq $256, %rax
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xorq $256, %rax
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// FIXME: Check that this matches SUB8rr
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// CHECK: subb %al, %bl
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subb %al, %bl
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// FIXME: Check that this matches SUB16rr
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// CHECK: subw %ax, %bx
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subw %ax, %bx
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// FIXME: Check that this matches SUB32rr
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// CHECK: subl %eax, %ebx
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subl %eax, %ebx
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// FIXME: Check that this matches the correct instruction.
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// CHECK: callq *%rax
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call *%rax
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// FIXME: Check that this matches the correct instruction.
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// CHECK: shldl %cl, %eax, %ebx
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shldl %cl, %eax, %ebx
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// CHECK: shll $2, %eax
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shll $2, %eax
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// CHECK: shll $2, %eax
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sall $2, %eax
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// CHECK: rep
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// CHECK: insb
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rep;insb
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// CHECK: rep
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// CHECK: outsb
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rep;outsb
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// CHECK: rep
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// CHECK: movsb
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rep;movsb
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// CHECK: rep
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// CHECK: lodsb
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rep;lodsb
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// CHECK: rep
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// CHECK: stosb
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rep;stosb
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// NOTE: repz and repe have the same opcode as rep
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// CHECK: rep
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// CHECK: cmpsb
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repz;cmpsb
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// NOTE: repnz has the same opcode as repne
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// CHECK: repne
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// CHECK: cmpsb
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repnz;cmpsb
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// NOTE: repe and repz have the same opcode as rep
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// CHECK: rep
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// CHECK: scasb
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repe;scasb
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// CHECK: repne
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// CHECK: scasb
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repne;scasb
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// CHECK: lock
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// CHECK: cmpxchgb %al, (%ebx)
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lock;cmpxchgb %al, 0(%ebx)
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// CHECK: cs
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// CHECK: movb (%eax), %al
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cs;movb 0(%eax), %al
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// CHECK: ss
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// CHECK: movb (%eax), %al
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ss;movb 0(%eax), %al
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// CHECK: ds
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// CHECK: movb (%eax), %al
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ds;movb 0(%eax), %al
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// CHECK: es
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// CHECK: movb (%eax), %al
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es;movb 0(%eax), %al
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// CHECK: fs
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// CHECK: movb (%eax), %al
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fs;movb 0(%eax), %al
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// CHECK: gs
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// CHECK: movb (%eax), %al
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gs;movb 0(%eax), %al
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// CHECK: fadd %st(0)
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// CHECK: fadd %st(1)
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// CHECK: fadd %st(7)
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fadd %st(0)
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fadd %st(1)
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fadd %st(7)
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// CHECK: leal 0, %eax
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leal 0, %eax
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// rdar://7986634 - Insensitivity on opcodes.
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// CHECK: int3
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INT3
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// Allow scale factor without index register.
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// CHECK: movaps %xmm3, (%esi)
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// CHECK-STDERR: warning: scale factor without index register is ignored
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movaps %xmm3, (%esi, 2)
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// CHECK: imull $12, %eax, %eax
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imul $12, %eax
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// CHECK: imull %ecx, %eax
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imull %ecx, %eax
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// rdar://8208481
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// CHECK: outb %al, $161
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outb %al, $161
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// CHECK: outw %ax, $128
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outw %ax, $128
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// CHECK: inb $161, %al
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inb $161, %al
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// rdar://8017621
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// CHECK: pushq $1
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push $1
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// rdar://8017530
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// CHECK: sldtw 4
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sldt 4
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// rdar://8208499
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// CHECK: cmovnew %bx, %ax
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cmovnz %bx, %ax
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// CHECK: cmovneq %rbx, %rax
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cmovnzq %rbx, %rax
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// rdar://8407928
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// CHECK: inb $127, %al
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// CHECK: inw %dx, %ax
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// CHECK: outb %al, $127
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// CHECK: outw %ax, %dx
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// CHECK: inl %dx, %eax
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inb $0x7f
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inw %dx
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outb $0x7f
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outw %dx
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inl %dx
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// PR8114
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// CHECK: outb %al, %dx
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// CHECK: outw %ax, %dx
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// CHECK: outl %eax, %dx
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out %al, (%dx)
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out %ax, (%dx)
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outl %eax, (%dx)
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