Christian Konig 06091513c2 pre-RA-sched: fix TargetOpcode usage ...

TargetOpcodes need to be treaded as Machine- and not ISD-Opcodes.

Signed-off-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177518 91177308-0d34-0410-b5e6-96231b3b80d8

2013-03-20 13:49:22 +00:00

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CMakeLists.txt

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DAGCombiner.cpp

Avoid generating ISD::SELECT for vector operands to SIGN_EXTEND

2013-03-12 18:17:18 +00:00

FastISel.cpp

Fix a crasher newly introduced in r176659/r176649, where fast-isel tries to

2013-03-11 21:44:37 +00:00

FunctionLoweringInfo.cpp

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InstrEmitter.cpp

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InstrEmitter.h

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LegalizeDAG.cpp

Remove default from fully covered switch.

2013-03-08 17:03:19 +00:00

LegalizeFloatTypes.cpp

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LegalizeIntegerTypes.cpp

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LegalizeTypes.cpp

Propagate DAG node ordering during type legalization and instruction selection

2013-03-20 00:10:32 +00:00

LegalizeTypes.h

Propagate DAG node ordering during type legalization and instruction selection

2013-03-20 00:10:32 +00:00

LegalizeTypesGeneric.cpp

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LegalizeVectorOps.cpp

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LegalizeVectorTypes.cpp

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LLVMBuild.txt

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Makefile

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ResourcePriorityQueue.cpp

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ScheduleDAGFast.cpp

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ScheduleDAGRRList.cpp

pre-RA-sched: fix TargetOpcode usage

2013-03-20 13:49:22 +00:00

ScheduleDAGSDNodes.cpp

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ScheduleDAGSDNodes.h

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ScheduleDAGVLIW.cpp

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SDNodeDbgValue.h

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SDNodeOrdering.h

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SelectionDAG.cpp

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SelectionDAGBuilder.cpp

Revert r176154 in favor of a better approach.

2013-03-08 02:21:08 +00:00

SelectionDAGBuilder.h

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SelectionDAGDumper.cpp

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SelectionDAGISel.cpp

Propagate DAG node ordering during type legalization and instruction selection

2013-03-20 00:10:32 +00:00

SelectionDAGPrinter.cpp

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TargetLowering.cpp

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TargetSelectionDAGInfo.cpp

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