llvm-6502/lib/Target/AArch64
Juergen Ributzka 52a6f59d41 [FastISel][AArch64] Emit immediate version of icmp (subs) for null pointer check.
This is a minor change to use the immediate version when the operand is a null
value. This should get rid of an unnecessary 'mov' instruction in debug
builds and align the code more with the one generated by SelectionDAG.

This fixes rdar://problem/18785125.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220713 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 19:58:36 +00:00
..
AsmParser [AArch64] Add support for the .inst directive. 2014-10-22 20:35:57 +00:00
Disassembler [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
InstPrinter [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
MCTargetDesc [AArch64] Add support for the .inst directive. 2014-10-22 20:35:57 +00:00
TargetInfo
Utils [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
AArch64.h [AArch64] Add workaround for Cortex-A53 erratum (835769) 2014-10-13 10:12:35 +00:00
AArch64.td
AArch64A53Fix835769.cpp [AArch64] Fix crash with empty/pseudo-only blocks in A53 erratum (835769) workaround 2014-10-14 14:02:41 +00:00
AArch64A57FPLoadBalancing.cpp Eliminate some deep std::vector copies. NFC. 2014-10-03 18:33:16 +00:00
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp [FastISel][AArch64] Emit immediate version of icmp (subs) for null pointer check. 2014-10-27 19:58:36 +00:00
AArch64FrameLowering.cpp [Stackmaps] Make ithe frame-pointer required for stackmaps. 2014-10-02 22:21:49 +00:00
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
AArch64InstrInfo.cpp Remove unused variable. 2014-10-15 00:09:07 +00:00
AArch64InstrInfo.h [AAarch64] Optimize CSINC-branch sequence 2014-10-14 23:07:53 +00:00
AArch64InstrInfo.td [AArch64] Generate vector signed/unsigned mul and mla/mls long. 2014-10-08 02:31:24 +00:00
AArch64ISelDAGToDAG.cpp [AArch64]Select wide immediate offset into [Base+XReg] addressing mode 2014-10-14 06:50:36 +00:00
AArch64ISelLowering.cpp [AArch64] Fix a silent codegen fault in BUILD_VECTOR lowering. 2014-10-17 17:06:31 +00:00
AArch64ISelLowering.h [AArch64] Generate vector signed/unsigned mul and mla/mls long. 2014-10-08 02:31:24 +00:00
AArch64LoadStoreOptimizer.cpp
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp [PBQP] Unique allowed-sets for nodes in the PBQP graph and use pairs of these 2014-10-27 17:44:25 +00:00
AArch64PBQPRegAlloc.h [AArch64] Cleanup A57PBQPConstraints 2014-10-22 12:40:20 +00:00
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td [AArch64] Enable partial & runtime unrolling on cortex-a57. 2014-10-09 10:13:27 +00:00
AArch64SchedA57WriteRes.td [AArch64] Refines the Cortex-A57 Machine Model 2014-09-29 21:27:36 +00:00
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp [AArch64] Cleanup A57PBQPConstraints 2014-10-22 12:40:20 +00:00
AArch64Subtarget.h [PBQP] Replace PBQPBuilder with composable constraints (PBQPRAConstraint). 2014-10-09 18:20:51 +00:00
AArch64TargetMachine.cpp [PBQP] Teach PassConfig to tell if the default register allocator is used. 2014-10-21 20:47:22 +00:00
AArch64TargetMachine.h [PBQP] Teach PassConfig to tell if the default register allocator is used. 2014-10-21 20:47:22 +00:00
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp [AArch64] Enable partial & runtime unrolling on cortex-a57. 2014-10-09 10:13:27 +00:00
CMakeLists.txt [AArch64] Add workaround for Cortex-A53 erratum (835769) 2014-10-13 10:12:35 +00:00
LLVMBuild.txt
Makefile