llvm-6502/test/CodeGen/X86/byval5.ll
Evan Cheng 1887c1c2f9 Fix a number of byval / memcpy / memset related codegen issues.
1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying.
2. Do not use byte repeat move and store operations. These are slow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 21:00:15 +00:00

45 lines
1.8 KiB
LLVM

; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsq | count 2
; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2
%struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
i8 }
define void @g(i8 signext %a1, i8 signext %a2, i8 signext %a3,
i8 signext %a4, i8 signext %a5, i8 signext %a6) {
entry:
%a = alloca %struct.s
%tmp = getelementptr %struct.s* %a, i32 0, i32 0
store i8 %a1, i8* %tmp, align 8
%tmp2 = getelementptr %struct.s* %a, i32 0, i32 1
store i8 %a2, i8* %tmp2, align 8
%tmp4 = getelementptr %struct.s* %a, i32 0, i32 2
store i8 %a3, i8* %tmp4, align 8
%tmp6 = getelementptr %struct.s* %a, i32 0, i32 3
store i8 %a4, i8* %tmp6, align 8
%tmp8 = getelementptr %struct.s* %a, i32 0, i32 4
store i8 %a5, i8* %tmp8, align 8
%tmp10 = getelementptr %struct.s* %a, i32 0, i32 5
store i8 %a6, i8* %tmp10, align 8
call void @f( %struct.s* %a byval )
call void @f( %struct.s* %a byval )
ret void
}
declare void @f(%struct.s* byval)