llvm-6502/test/CodeGen
2011-04-14 23:27:44 +00:00
..
Alpha
ARM Fix a typo in an ARM-specific DAG combine. This fixes <rdar://problem/9278274>. 2011-04-13 21:01:19 +00:00
Blackfin Don't completely eliminate identity copies that also modify super register liveness. 2011-03-31 17:55:25 +00:00
CBackend
CellSPU don't test for codegen of 'store undef' 2011-04-09 02:31:26 +00:00
CPP
Generic Fix a bug where RecursivelyDeleteTriviallyDeadInstructions could 2011-04-09 07:05:44 +00:00
MBlaze Add scheduling information for the MBlaze backend. 2011-04-11 22:31:52 +00:00
Mips Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. 2011-04-13 00:38:32 +00:00
MSP430
PowerPC These tests no longer require linear scan because reserved register coalescing is now universal. 2011-04-05 21:40:41 +00:00
PTX ptx: support setp's 4-operand format 2011-04-02 08:51:39 +00:00
SPARC These tests no longer require linear scan because reserved register coalescing is now universal. 2011-04-05 21:40:41 +00:00
SystemZ Fix SystemZ tests 2011-03-31 23:02:12 +00:00
Thumb Follow up on r127913. Fix Thumb revsh isel. rdar://9286766 2011-04-14 23:27:44 +00:00
Thumb2 Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. 2011-04-13 00:38:32 +00:00
X86 Change ELF systems to use CFI for producing the EH tables. This reduces the 2011-04-14 15:18:53 +00:00
XCore Fix Mips, Sparc, and XCore tests that were dependent on register allocation. 2011-03-31 18:42:43 +00:00