Akira Hatanaka a032dbd62f [mips] Fix delay slot filler so that instructions with register operand $1 are ... allowed in branch delay slot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168131 91177308-0d34-0410-b5e6-96231b3b80d8		2012-11-16 02:39:34 +00:00
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ARM	Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missing	2012-11-15 22:44:27 +00:00
CPP
Generic	Codegen support for arbitrary vector getelementptrs.	2012-11-13 13:01:58 +00:00
Hexagon	test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts.	2012-11-14 22:22:37 +00:00
MBlaze
Mips	[mips] Fix delay slot filler so that instructions with register operand $1 are	2012-11-16 02:39:34 +00:00
MSP430	Fix fallout from RegInfo => FrameLowering refactoring on MSP430.	2012-10-17 17:37:11 +00:00
NVPTX	[NVPTX] Implement custom lowering of loads/stores for i1	2012-11-14 19:19:16 +00:00
PowerPC	PowerPC: Lowering floor intrinsic for Altivec	2012-11-15 20:56:03 +00:00
SPARC	Use TargetTransformInfo to control switch-to-lookup table transformation	2012-10-30 11:23:25 +00:00
Thumb	Convert an improper CodeGen test to a MC test.	2012-11-10 04:30:40 +00:00
Thumb2	Add GPRPair Register class to ARM.	2012-10-26 21:29:15 +00:00
X86	Make sure to not get AVX code on an AVX-capable host. Revealed in r167967.	2012-11-14 22:24:01 +00:00
XCore