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llvm-6502/lib/Target/X86/Disassembler
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Sean Callanan a21e2eae3d X86 table-generator and disassembler support for the AVX 
instruction set.  This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures.  Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15 01:23:15 +00:00
..
CMakeLists.txt CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some files in Target/ARM and Target/X86. 2010-12-29 03:59:27 +00:00
Makefile
X86Disassembler.cpp X86 table-generator and disassembler support for the AVX 2011-03-15 01:23:15 +00:00
X86Disassembler.h Make the disassembler tables const so they end up in read-only memory. 2010-10-23 09:10:44 +00:00
X86DisassemblerDecoder.c X86 table-generator and disassembler support for the AVX 2011-03-15 01:23:15 +00:00
X86DisassemblerDecoder.h X86 table-generator and disassembler support for the AVX 2011-03-15 01:23:15 +00:00
X86DisassemblerDecoderCommon.h X86 table-generator and disassembler support for the AVX 2011-03-15 01:23:15 +00:00