llvm-6502/test/MC
Johnny Chen 94dad03a96 Fixed an assert by the ARM disassembler for LDRD_PRE/POST.
The relevant instruction table entries were changed sometime ago to no longer take
<Rt2> as an operand.  Modify ARMDisassemblerCore.cpp to accomodate the change and
add a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127935 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-19 01:16:20 +00:00
..
ARM Add support to the ARM asm parser for the register-shifted-register forms of basic instructions like ADD. More work left to be done to support other instances of shifter ops in the ISA. 2011-03-18 22:50:18 +00:00
AsmParser
COFF
Disassembler Fixed an assert by the ARM disassembler for LDRD_PRE/POST. 2011-03-19 01:16:20 +00:00
ELF
MachO
MBlaze
X86