mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-17 03:30:28 +00:00
d46b2e219d
Summary: dsbh and dshd are not available on Mips32r2. No codegen test changes required since expansion of i64 prevented the use of these instructions anyway. Depends on D3690 Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3692 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208542 91177308-0d34-0410-b5e6-96231b3b80d8
11 lines
399 B
ArmAsm
11 lines
399 B
ArmAsm
# Instructions that are invalid
|
|
#
|
|
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding \
|
|
# RUN: -mcpu=mips32r2 2>%t1
|
|
# RUN: FileCheck %s < %t1
|
|
|
|
.set noat
|
|
dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
|
dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
|
|