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The header contains an offset to the DWARF abbreviations for the CU. The offset must be section relative for COFF and absolute for others. The non-assembly code path for the DWARF header generation already had the correct emission for the headers. This corrects just the assembly path. Due to the invalid relocation, processing of the debug information would halt previously on the first assembly input as the associated abbreviations would be out of range as they would have the location increased by image base and the section offset. This address PR20332. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213275 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
753 B
ArmAsm
23 lines
753 B
ArmAsm
# RUN: llvm-mc -triple i686-windows-gnu -g %s -filetype obj -o - \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix CHECK-COFF %s
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# RUN: llvm-mc -triple i686-windows-itanium -g %s -filetype obj -o - \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix CHECK-COFF %s
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# RUN: llvm-mc -triple i686-linux-gnu -g %s -filetype obj -o - \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix CHECK-ELF %s
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_a:
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movl $65, %eax
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ret
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# CHECK-COFF: Relocations [
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# CHECK-COFF: Section {{.*}} .debug_info {
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# CHECK-COFF: 0x6 IMAGE_REL_I386_SECREL .debug_abbrev
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# CHECK-COFF: }
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# CHECK-COFF: ]
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# CHECK-ELF: Relocations [
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# CHECK-ELF: Section {{.*}} .rel.debug_info {
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# CHECK-ELF: 0x6 R_386_32 .debug_abbrev
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# CHECK-ELF: }
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# CHECK-ELF: ]
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