mirror of
https://github.com/c64scene-ar/llvm-6502.git
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32b952a2a6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56621 91177308-0d34-0410-b5e6-96231b3b80d8
65 lines
2.0 KiB
C++
65 lines
2.0 KiB
C++
//=====-- ARMTargetAsmInfo.h - ARM asm properties -------------*- C++ -*--====//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declaration of the ARMTargetAsmInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARMTARGETASMINFO_H
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#define ARMTARGETASMINFO_H
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#include "ARMTargetMachine.h"
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#include "llvm/Target/TargetAsmInfo.h"
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#include "llvm/Target/ELFTargetAsmInfo.h"
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#include "llvm/Target/DarwinTargetAsmInfo.h"
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#include "llvm/Support/Compiler.h"
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namespace llvm {
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extern const char *const arm_asm_table[];
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template <class BaseTAI>
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struct ARMTargetAsmInfo : public BaseTAI {
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explicit ARMTargetAsmInfo(const ARMTargetMachine &TM):
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BaseTAI(TM) {
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BaseTAI::AsmTransCBE = arm_asm_table;
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BaseTAI::AlignmentIsInBytes = false;
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BaseTAI::Data64bitsDirective = 0;
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BaseTAI::CommentString = "@";
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BaseTAI::ConstantPoolSection = "\t.text\n";
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BaseTAI::COMMDirectiveTakesAlignment = false;
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BaseTAI::InlineAsmStart = "@ InlineAsm Start";
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BaseTAI::InlineAsmEnd = "@ InlineAsm End";
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BaseTAI::LCOMMDirective = "\t.lcomm\t";
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}
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const ARMSubtarget *Subtarget;
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virtual unsigned getInlineAsmLength(const char *Str) const;
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unsigned countArguments(const char *p) const;
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unsigned countString(const char *p) const;
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};
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typedef ARMTargetAsmInfo<TargetAsmInfo> ARMGenericTargetAsmInfo;
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EXTERN_TEMPLATE_INSTANTIATION(class ARMTargetAsmInfo<TargetAsmInfo>);
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struct ARMDarwinTargetAsmInfo : public ARMTargetAsmInfo<DarwinTargetAsmInfo> {
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explicit ARMDarwinTargetAsmInfo(const ARMTargetMachine &TM);
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};
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struct ARMELFTargetAsmInfo : public ARMTargetAsmInfo<ELFTargetAsmInfo> {
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explicit ARMELFTargetAsmInfo(const ARMTargetMachine &TM);
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};
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} // namespace llvm
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#endif
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