llvm-6502/test/Transforms/SLPVectorizer
Arnold Schwaighofer 074e489dbc SLPVectorizer: Handle more horizontal reductions (disabled)
Match reductions starting at binary operation feeding into a phi. The code
handles trees like

 r += v1 + v2 + v3 ...

and

 r += v1
 r += v2
 ...

and

 r *= v1 + v2 + ...

We currently only handle associative operations (add, fadd fast).

The code can now also handle reductions feeding into stores.

 a[i] = v1 + v2 + v3 + ...

The code is currently disabled behind the flag "-slp-vectorize-hor".  The cost
model for most architectures is not there yet.

I found one opportunity of a horizontal reduction feeding a phi in TSVC
(LoopRerolling-flt) and there are several opportunities where reductions feed
into stores.

radar://14607682

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191108 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-20 21:18:20 +00:00
..
X86 SLPVectorizer: Handle more horizontal reductions (disabled) 2013-09-20 21:18:20 +00:00
XCore Name the XCore target-specific subdirectories canonically. 2013-09-18 14:08:30 +00:00