Owen Anderson 0781c1f700 Post-index loads/stores in still need to print the post-indexed immediate, even if it's zero, to distinguish them from non-post-indexed instructions. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140420 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-23 21:26:40 +00:00
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ARM	Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused.	2011-09-21 23:53:44 +00:00
AsmParser	Added regression test for bug #10869.	2011-09-19 07:48:08 +00:00
COFF
Disassembler	Post-index loads/stores in still need to print the post-indexed immediate, even if it's zero, to distinguish them from non-post-indexed instructions.	2011-09-23 21:26:40 +00:00
ELF
MachO
MBlaze
X86	The wrong relocation was being emitted for several SSSE3 instructions.	2011-09-20 21:39:21 +00:00