llvm-6502/test/Transforms/LowerSwitch/2014-06-11-SwitchDefaultUnreachableOpt.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

45 lines
670 B
LLVM

; RUN: opt < %s -lowerswitch -S | FileCheck %s
;
; The switch is lowered with a single icmp.
; CHECK: icmp
; CHECK-NOT: icmp
;
;int foo(int a) {
;
; switch (a) {
; case 0:
; return 10;
; case 1:
; return 3;
; default:
; __builtin_unreachable();
; }
;
;}
define i32 @foo(i32 %a) {
%1 = alloca i32, align 4
%2 = alloca i32, align 4
store i32 %a, i32* %2, align 4
%3 = load i32, i32* %2, align 4
switch i32 %3, label %6 [
i32 0, label %4
i32 1, label %5
]
; <label>:4
store i32 10, i32* %1
br label %7
; <label>:5
store i32 3, i32* %1
br label %7
; <label>:6
unreachable
; <label>:7
%8 = load i32, i32* %1
ret i32 %8
}