llvm-6502/test/CodeGen/X86/test-shrink.ll
Dan Gohman 6a402dc952 Add an x86 peep that narrows TEST instructions to forms that use
a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:16:17 +00:00

159 lines
2.9 KiB
LLVM

; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
; RUN: llvm-as < %s | llc -march=x86 | FileCheck %s --check-prefix=CHECK-32
; CHECK-64: g64xh:
; CHECK-64: testb $8, %ah
; CHECK-64: ret
; CHECK-32: g64xh:
; CHECK-32: testb $8, %ah
; CHECK-32: ret
define void @g64xh(i64 inreg %x) nounwind {
%t = and i64 %x, 2048
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g64xl:
; CHECK-64: testb $8, %dil
; CHECK-64: ret
; CHECK-32: g64xl:
; CHECK-32: testb $8, %al
; CHECK-32: ret
define void @g64xl(i64 inreg %x) nounwind {
%t = and i64 %x, 8
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g32xh:
; CHECK-64: testb $8, %ah
; CHECK-64: ret
; CHECK-32: g32xh:
; CHECK-32: testb $8, %ah
; CHECK-32: ret
define void @g32xh(i32 inreg %x) nounwind {
%t = and i32 %x, 2048
%s = icmp eq i32 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g32xl:
; CHECK-64: testb $8, %dil
; CHECK-64: ret
; CHECK-32: g32xl:
; CHECK-32: testb $8, %al
; CHECK-32: ret
define void @g32xl(i32 inreg %x) nounwind {
%t = and i32 %x, 8
%s = icmp eq i32 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g16xh:
; CHECK-64: testb $8, %ah
; CHECK-64: ret
; CHECK-32: g16xh:
; CHECK-32: testb $8, %ah
; CHECK-32: ret
define void @g16xh(i16 inreg %x) nounwind {
%t = and i16 %x, 2048
%s = icmp eq i16 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g16xl:
; CHECK-64: testb $8, %dil
; CHECK-64: ret
; CHECK-32: g16xl:
; CHECK-32: testb $8, %al
; CHECK-32: ret
define void @g16xl(i16 inreg %x) nounwind {
%t = and i16 %x, 8
%s = icmp eq i16 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g64x16:
; CHECK-64: testw $32896, %di
; CHECK-64: ret
; CHECK-32: g64x16:
; CHECK-32: testw $32896, %ax
; CHECK-32: ret
define void @g64x16(i64 inreg %x) nounwind {
%t = and i64 %x, 32896
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g32x16:
; CHECK-64: testw $32896, %di
; CHECK-64: ret
; CHECK-32: g32x16:
; CHECK-32: testw $32896, %ax
; CHECK-32: ret
define void @g32x16(i32 inreg %x) nounwind {
%t = and i32 %x, 32896
%s = icmp eq i32 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g64x32:
; CHECK-64: testl $268468352, %edi
; CHECK-64: ret
; CHECK-32: g64x32:
; CHECK-32: testl $268468352, %eax
; CHECK-32: ret
define void @g64x32(i64 inreg %x) nounwind {
%t = and i64 %x, 268468352
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
declare void @bar()