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832254e1c2
This feature is needed in order to support shifts of more than 255 bits on large integer types. This changes the syntax for llvm assembly to make shl, ashr and lshr instructions look like a binary operator: shl i32 %X, 1 instead of shl i32 %X, i8 1 Additionally, this should help a few passes perform additional optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33776 91177308-0d34-0410-b5e6-96231b3b80d8
28 lines
1.0 KiB
LLVM
28 lines
1.0 KiB
LLVM
; All of these ands and shifts should be folded into rlw[i]nm instructions
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; RUN: llvm-as < %s | llc -march=ppc32 | not grep and &&
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; RUN: llvm-as < %s | llc -march=ppc32 | not grep srawi &&
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; RUN: llvm-as < %s | llc -march=ppc32 | not grep srwi &&
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; RUN: llvm-as < %s | llc -march=ppc32 | not grep slwi &&
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; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | wc -l | grep 1 &&
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; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | wc -l | grep 1
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define i32 @test1(i32 %X, i32 %Y) {
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entry:
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%tmp = trunc i32 %Y to i8 ; <i8> [#uses=2]
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%tmp1 = shl i32 %X, %Y ; <i32> [#uses=1]
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%tmp2 = sub i32 32, %Y ; <i8> [#uses=1]
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%tmp3 = lshr i32 %X, %tmp2 ; <i32> [#uses=1]
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%tmp4 = or i32 %tmp1, %tmp3 ; <i32> [#uses=1]
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%tmp6 = and i32 %tmp4, 127 ; <i32> [#uses=1]
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ret i32 %tmp6
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}
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define i32 @test2(i32 %X) {
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entry:
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%tmp1 = lshr i32 %X, 27 ; <i32> [#uses=1]
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%tmp2 = shl i32 %X, 5 ; <i32> [#uses=1]
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%tmp2.masked = and i32 %tmp2, 96 ; <i32> [#uses=1]
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%tmp5 = or i32 %tmp1, %tmp2.masked ; <i32> [#uses=1]
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ret i32 %tmp5
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}
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