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52b488a3f8
------------------------------------------------------------------------ r181800 | wschmidt | 2013-05-14 09:08:32 -0700 (Tue, 14 May 2013) | 15 lines PPC32: Fix stack collision between FP and CR save areas. The changes to CR spill handling missed a case for 32-bit PowerPC. The code in PPCFrameLowering::processFunctionBeforeFrameFinalized() checks whether CR spill has occurred using a flag in the function info. This flag is only set by storeRegToStackSlot and loadRegFromStackSlot. spillCalleeSavedRegisters does not call storeRegToStackSlot, but instead produces MI directly. Thus we don't see the CR is spilled when assigning frame offsets, and the CR spill ends up colliding with some other location (generally the FP slot). This patch sets the flag in spillCalleeSavedRegisters for PPC32 so that the CR spill is properly detected and gets its own slot in the stack frame. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181815 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.5 KiB
LLVM
58 lines
1.5 KiB
LLVM
; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC32
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; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC64
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declare void @foo()
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define i32 @test_cr2() nounwind {
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entry:
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%ret = alloca i32, align 4
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%0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind
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store i32 %0, i32* %ret, align 4
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call void @foo()
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%1 = load i32* %ret, align 4
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ret i32 %1
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}
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; PPC32: stw 31, -4(1)
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; PPC32: stwu 1, -32(1)
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; PPC32: mfcr 12
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; PPC32-NEXT: stw 12, 24(31)
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; PPC32: lwz 12, 24(31)
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; PPC32-NEXT: mtcrf 32, 12
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; PPC64: mfcr 12
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; PPC64: stw 12, 8(1)
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; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
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; PPC64: addi 1, 1, [[AMT]]
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; PPC64: lwz 12, 8(1)
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; PPC64: mtcrf 32, 12
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define i32 @test_cr234() nounwind {
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entry:
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%ret = alloca i32, align 4
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%0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09cmp 3,$2,$2\0A\09cmp 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind
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store i32 %0, i32* %ret, align 4
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call void @foo()
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%1 = load i32* %ret, align 4
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ret i32 %1
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}
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; PPC32: stw 31, -4(1)
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; PPC32: stwu 1, -32(1)
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; PPC32: mfcr 12
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; PPC32-NEXT: stw 12, 24(31)
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; PPC32: lwz 12, 24(31)
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; PPC32-NEXT: mtcrf 32, 12
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; PPC32-NEXT: mtcrf 16, 12
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; PPC32-NEXT: mtcrf 8, 12
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; PPC64: mfcr 12
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; PPC64: stw 12, 8(1)
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; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
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; PPC64: addi 1, 1, [[AMT]]
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; PPC64: lwz 12, 8(1)
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; PPC64: mtcrf 32, 12
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; PPC64: mtcrf 16, 12
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; PPC64: mtcrf 8, 12
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