llvm-6502/test/CodeGen
Hal Finkel 0882fd6c4f Implement FRINT lowering on PPC using frin
Like nearbyint, rint can be implemented on PPC using the frin instruction. The
complication comes from the fact that rint needs to set the FE_INEXACT flag
when the result does not equal the input value (and frin does not do that). As
a result, we use a custom inserter which, after the rounding, compares the
rounded value with the original, and if they differ, explicitly sets the XX bit
in the FPSCR register (which corresponds to FE_INEXACT).

Once LLVM has better modeling of the floating-point environment we should be
able to (often) eliminate this extra complexity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-29 19:41:55 +00:00
..
AArch64 Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings 2013-03-26 18:56:54 +00:00
ARM Remove the old CodePlacementOpt pass. 2013-03-29 17:14:24 +00:00
CPP
Generic
Hexagon Hexagon: Enable SupportDebugInfomation and DwarfInSection flags. 2013-03-28 19:34:49 +00:00
Inputs Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
MBlaze
Mips
MSP430
NVPTX
PowerPC Implement FRINT lowering on PPC using frin 2013-03-29 19:41:55 +00:00
R600 R600/SI: add SETO/SETUO patterns 2013-03-27 15:27:31 +00:00
SI
SPARC
Thumb Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
Thumb2
X86 Remove the old CodePlacementOpt pass. 2013-03-29 17:14:24 +00:00
XCore