mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-21 08:17:40 +00:00
Tom Stellard
cd4bff761f
------------------------------------------------------------------------ r214463 | thomas.stellard | 2014-07-31 20:32:28 -0400 (Thu, 31 Jul 2014) | 7 lines R600/SI: Fix incorrect commute operation in shrink instructions pass We were commuting the instruction by still shrinking it using the original opcode. NOTE: This is a candidate for the 3.5 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@214894 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.4 KiB
LLVM
42 lines
1.4 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; XXX: This testis for a bug in the SIShrinkInstruction pass and it will be
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; relevant once we are selecting 64-bit instructions. We are
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; currently selecting mostly 32-bit instruction, so the
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; SIShrinkInstructions pass isn't doing much.
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; XFAIL: *
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; Test that we correctly commute a sub instruction
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; FUNC-LABEL: @sub_rev
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; SI-NOT: V_SUB_I32_e32 v{{[0-9]+}}, s
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; SI: V_SUBREV_I32_e32 v{{[0-9]+}}, s
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; ModuleID = 'vop-shrink.ll'
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define void @sub_rev(i32 addrspace(1)* %out, <4 x i32> %sgpr, i32 %cond) {
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entry:
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%vgpr = call i32 @llvm.r600.read.tidig.x() #1
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%tmp = icmp eq i32 %cond, 0
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br i1 %tmp, label %if, label %else
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if: ; preds = %entry
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%tmp1 = getelementptr i32 addrspace(1)* %out, i32 1
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%tmp2 = extractelement <4 x i32> %sgpr, i32 1
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store i32 %tmp2, i32 addrspace(1)* %out
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br label %endif
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else: ; preds = %entry
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%tmp3 = extractelement <4 x i32> %sgpr, i32 2
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%tmp4 = sub i32 %vgpr, %tmp3
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store i32 %tmp4, i32 addrspace(1)* %out
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br label %endif
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endif: ; preds = %else, %if
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ret void
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.tidig.x() #0
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attributes #0 = { nounwind readnone }
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attributes #1 = { readnone }
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