Evan Cheng 088880cb19 Change allowsUnalignedMemoryAccesses to take type argument since some targets ... support unaligned mem access only for certain types. (Should it be size instead?) ARM v7 supports unaligned access for i16 and i32, some v6 variants support it as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79127 91177308-0d34-0410-b5e6-96231b3b80d8		2009-08-15 19:23:44 +00:00
..
COFFTargetAsmInfo.h	remove TargetAsmInfo::TM, which is now dead. The basic TAI class now	2009-08-02 04:27:24 +00:00
DarwinTargetAsmInfo.h	Revert 78892 and 78895, these break generating working executables on	2009-08-13 17:03:38 +00:00
SubtargetFeature.h
Target.td	Add 'isCodeGenOnly' bit to Instruction .td records.	2009-08-11 22:17:52 +00:00
TargetAsmInfo.h	Remove HasCrazyBSS and add a flag in TAI to indicate that '.section'	2009-08-13 23:30:21 +00:00
TargetAsmParser.h	Move X86 instruction parsing into X86/AsmParser.	2009-07-28 22:40:46 +00:00
TargetCallingConv.td	Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore fixes here and there (mostly __m64).	2009-08-03 08:13:56 +00:00
TargetData.h	Push LLVMContexts through the IntegerType APIs.	2009-08-13 21:58:54 +00:00
TargetELFWriterInfo.h	- Remove custom handling of jumptables by the elf writter (this was	2009-08-05 06:57:03 +00:00
TargetFrameInfo.h
TargetInstrDesc.h	1. Introduce a new TargetOperandInfo::getRegClass() helper method	2009-07-29 21:10:12 +00:00
TargetInstrInfo.h	Move the getInlineAsmLength virtual method from TAI to TII, where	2009-08-02 05:20:37 +00:00
TargetInstrItineraries.h	Enhance the InstrStage object to enable the specification of an Itinerary with overlapping stages. The default is to maintain the current behavior that the "next" stage immediately follows the previous one.	2009-08-12 18:31:53 +00:00
TargetIntrinsicInfo.h
TargetJITInfo.h	First patch in the direction of splitting MachineCodeEmitter in two subclasses:	2009-05-30 20:51:52 +00:00
TargetLowering.h	Change allowsUnalignedMemoryAccesses to take type argument since some targets	2009-08-15 19:23:44 +00:00
TargetLoweringObjectFile.h	Remove HasCrazyBSS and add a flag in TAI to indicate that '.section'	2009-08-13 23:30:21 +00:00
TargetMachine.h	Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple	2009-08-12 07:22:17 +00:00
TargetMachOWriterInfo.h
TargetOptions.h	SjLj based exception handling unwinding support. This patch is nasty, brutish	2009-08-11 00:09:57 +00:00
TargetRegisterInfo.h	Split EVT into MVT and EVT, the former representing _just_ a primitive type, while	2009-08-11 20:47:22 +00:00
TargetRegistry.h	TargetRegistry: Change AsmPrinter constructor to be typed as returning an	2009-08-13 23:48:47 +00:00
TargetSchedule.td	Enhance the InstrStage object to enable the specification of an Itinerary with overlapping stages. The default is to maintain the current behavior that the "next" stage immediately follows the previous one.	2009-08-12 18:31:53 +00:00
TargetSelect.h	Add llvm::InitializeAllTargetInfos and llvm::InitializeAllAsmParsers.	2009-07-17 22:35:35 +00:00
TargetSelectionDAG.td	Add a new "SDTCisVec" SDTypeConstraint. This complements the vAny type.	2009-08-12 22:30:59 +00:00
TargetSubtarget.h	Add callback to allow target to adjust latency of schedule dependency edge.	2009-08-13 16:05:04 +00:00