Evan Cheng 089751535d Avoiding overly aggressive latency scheduling. If the two nodes share an ... operand and one of them has a single use that is a live out copy, favor the one that is live out. Otherwise it will be difficult to eliminate the copy if the instruction is a loop induction variable update. e.g. BB: sub r1, r3, #1 str r0, [r2, r3] mov r3, r1 cmp bne BB => BB: str r0, [r2, r3] sub r3, r3, #1 cmp bne BB This fixed the recent 256.bzip2 regression. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117675 91177308-0d34-0410-b5e6-96231b3b80d8		2010-10-29 18:09:28 +00:00
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Analysis	Teach memdep to use pointsToConstantMemory to determine that loads	2010-10-29 01:14:04 +00:00
Archive
AsmParser
Bitcode
CodeGen	Avoiding overly aggressive latency scheduling. If the two nodes share an	2010-10-29 18:09:28 +00:00
CompilerDriver
ExecutionEngine
Linker
MC
Support	Fix these error messages to be less confusing. These error	2010-10-29 17:03:40 +00:00
System	Check if ErrMsg is null. This fixes the "not" command.	2010-10-29 17:20:42 +00:00
Target	Avoiding overly aggressive latency scheduling. If the two nodes share an	2010-10-29 18:09:28 +00:00
Transforms	Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.	2010-10-29 17:29:13 +00:00
VMCore	Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.	2010-10-29 17:29:13 +00:00
Makefile