mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-26 21:32:10 +00:00
0e6b590b91
physical registers. This is especially critical for the later two since they start the live interval of a super-register. e.g. %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1 If this instruction is eliminated, the register scavenger will not be happy as D0 is not defined previously. This fixes PR5055. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82968 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
531 B
LLVM
20 lines
531 B
LLVM
; RUN: llc < %s -march=bfin -verify-machineinstrs
|
|
|
|
; When joining live intervals of sub-registers, an MBB live-in list is not
|
|
; updated properly. The register scavenger asserts on an undefined register.
|
|
|
|
define i32 @foo(i8 %bar) {
|
|
entry:
|
|
switch i8 %bar, label %bb1203 [
|
|
i8 117, label %bb1204
|
|
i8 85, label %bb1204
|
|
i8 106, label %bb1204
|
|
]
|
|
|
|
bb1203: ; preds = %entry
|
|
ret i32 1
|
|
|
|
bb1204: ; preds = %entry, %entry, %entry
|
|
ret i32 2
|
|
}
|