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instructions which define each value#) to simplify and improve the coallescer. In particular, this patch: 1. Implements iterative coallescing. 2. Reverts an unsafe hack from handlePhysRegDef, superceeding it with a better solution. 3. Implements PR865, "coallescing" away the second copy in code like: A = B ... B = A This also includes changes to symbolically print registers in intervals when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29862 91177308-0d34-0410-b5e6-96231b3b80d8
875 lines
36 KiB
C++
875 lines
36 KiB
C++
//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the VirtRegMap class.
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//
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// It also contains implementations of the the Spiller interface, which, given a
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// virtual register map and a machine function, eliminates all virtual
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// references by replacing them with physical register references - adding spill
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// code as necessary.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "spiller"
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#include "VirtRegMap.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Visibility.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/STLExtras.h"
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#include <algorithm>
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#include <iostream>
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using namespace llvm;
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namespace {
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static Statistic<> NumSpills("spiller", "Number of register spills");
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static Statistic<> NumStores("spiller", "Number of stores added");
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static Statistic<> NumLoads ("spiller", "Number of loads added");
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static Statistic<> NumReused("spiller", "Number of values reused");
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static Statistic<> NumDSE ("spiller", "Number of dead stores elided");
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static Statistic<> NumDCE ("spiller", "Number of copies elided");
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enum SpillerName { simple, local };
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static cl::opt<SpillerName>
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SpillerOpt("spiller",
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cl::desc("Spiller to use: (default: local)"),
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cl::Prefix,
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cl::values(clEnumVal(simple, " simple spiller"),
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clEnumVal(local, " local spiller"),
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clEnumValEnd),
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cl::init(local));
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}
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//===----------------------------------------------------------------------===//
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// VirtRegMap implementation
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//===----------------------------------------------------------------------===//
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void VirtRegMap::grow() {
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Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg());
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Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg());
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}
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int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
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assert(MRegisterInfo::isVirtualRegister(virtReg));
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assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
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"attempt to assign stack slot to already spilled register");
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const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
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int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
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RC->getAlignment());
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Virt2StackSlotMap[virtReg] = frameIndex;
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++NumSpills;
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return frameIndex;
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}
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void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
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assert(MRegisterInfo::isVirtualRegister(virtReg));
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assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
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"attempt to assign stack slot to already spilled register");
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Virt2StackSlotMap[virtReg] = frameIndex;
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}
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void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
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unsigned OpNo, MachineInstr *NewMI) {
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// Move previous memory references folded to new instruction.
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MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
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for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
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E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
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MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
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MI2VirtMap.erase(I++);
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}
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ModRef MRInfo;
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if (!OldMI->getOperand(OpNo).isDef()) {
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assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?");
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MRInfo = isRef;
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} else {
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MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod;
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}
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// add new memory reference
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MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
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}
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void VirtRegMap::print(std::ostream &OS) const {
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const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
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OS << "********** REGISTER MAP **********\n";
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for (unsigned i = MRegisterInfo::FirstVirtualRegister,
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e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
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if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
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OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
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}
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for (unsigned i = MRegisterInfo::FirstVirtualRegister,
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e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
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if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
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OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
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OS << '\n';
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}
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void VirtRegMap::dump() const { print(std::cerr); }
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//===----------------------------------------------------------------------===//
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// Simple Spiller Implementation
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//===----------------------------------------------------------------------===//
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Spiller::~Spiller() {}
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namespace {
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struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
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bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
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};
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}
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bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
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DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
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DEBUG(std::cerr << "********** Function: "
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<< MF.getFunction()->getName() << '\n');
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const TargetMachine &TM = MF.getTarget();
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const MRegisterInfo &MRI = *TM.getRegisterInfo();
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bool *PhysRegsUsed = MF.getUsedPhysregs();
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// LoadedRegs - Keep track of which vregs are loaded, so that we only load
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// each vreg once (in the case where a spilled vreg is used by multiple
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// operands). This is always smaller than the number of operands to the
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// current machine instr, so it should be small.
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std::vector<unsigned> LoadedRegs;
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for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
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MBBI != E; ++MBBI) {
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DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n");
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MachineBasicBlock &MBB = *MBBI;
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for (MachineBasicBlock::iterator MII = MBB.begin(),
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E = MBB.end(); MII != E; ++MII) {
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MachineInstr &MI = *MII;
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for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI.getOperand(i);
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if (MO.isRegister() && MO.getReg())
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if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
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unsigned VirtReg = MO.getReg();
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unsigned PhysReg = VRM.getPhys(VirtReg);
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if (VRM.hasStackSlot(VirtReg)) {
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int StackSlot = VRM.getStackSlot(VirtReg);
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const TargetRegisterClass* RC =
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MF.getSSARegMap()->getRegClass(VirtReg);
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if (MO.isUse() &&
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std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
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== LoadedRegs.end()) {
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MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
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LoadedRegs.push_back(VirtReg);
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++NumLoads;
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DEBUG(std::cerr << '\t' << *prior(MII));
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}
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if (MO.isDef()) {
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MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
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++NumStores;
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}
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}
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PhysRegsUsed[PhysReg] = true;
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MI.getOperand(i).setReg(PhysReg);
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} else {
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PhysRegsUsed[MO.getReg()] = true;
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}
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}
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DEBUG(std::cerr << '\t' << MI);
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LoadedRegs.clear();
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}
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}
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return true;
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}
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//===----------------------------------------------------------------------===//
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// Local Spiller Implementation
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//===----------------------------------------------------------------------===//
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namespace {
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/// LocalSpiller - This spiller does a simple pass over the machine basic
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/// block to attempt to keep spills in registers as much as possible for
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/// blocks that have low register pressure (the vreg may be spilled due to
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/// register pressure in other blocks).
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class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
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const MRegisterInfo *MRI;
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const TargetInstrInfo *TII;
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public:
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bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
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MRI = MF.getTarget().getRegisterInfo();
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TII = MF.getTarget().getInstrInfo();
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DEBUG(std::cerr << "\n**** Local spiller rewriting function '"
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<< MF.getFunction()->getName() << "':\n");
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for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
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MBB != E; ++MBB)
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RewriteMBB(*MBB, VRM);
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return true;
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}
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private:
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void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
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void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots,
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std::multimap<unsigned, int> &PhysRegs);
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void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots,
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std::multimap<unsigned, int> &PhysRegs);
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void ModifyStackSlot(int Slot, std::map<int, unsigned> &SpillSlots,
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std::multimap<unsigned, int> &PhysRegs);
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};
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}
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/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
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/// top down, keep track of which spills slots are available in each register.
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///
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/// Note that not all physregs are created equal here. In particular, some
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/// physregs are reloads that we are allowed to clobber or ignore at any time.
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/// Other physregs are values that the register allocated program is using that
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/// we cannot CHANGE, but we can read if we like. We keep track of this on a
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/// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable
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/// entries. The predicate 'canClobberPhysReg()' checks this bit and
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/// addAvailable sets it if.
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namespace {
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class VISIBILITY_HIDDEN AvailableSpills {
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const MRegisterInfo *MRI;
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const TargetInstrInfo *TII;
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// SpillSlotsAvailable - This map keeps track of all of the spilled virtual
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// register values that are still available, due to being loaded or stored to,
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// but not invalidated yet.
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std::map<int, unsigned> SpillSlotsAvailable;
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// PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating
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// which stack slot values are currently held by a physreg. This is used to
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// invalidate entries in SpillSlotsAvailable when a physreg is modified.
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std::multimap<unsigned, int> PhysRegsAvailable;
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void ClobberPhysRegOnly(unsigned PhysReg);
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public:
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AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
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: MRI(mri), TII(tii) {
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}
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/// getSpillSlotPhysReg - If the specified stack slot is available in a
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/// physical register, return that PhysReg, otherwise return 0.
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unsigned getSpillSlotPhysReg(int Slot) const {
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std::map<int, unsigned>::const_iterator I = SpillSlotsAvailable.find(Slot);
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if (I != SpillSlotsAvailable.end())
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return I->second >> 1; // Remove the CanClobber bit.
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return 0;
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}
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const MRegisterInfo *getRegInfo() const { return MRI; }
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/// addAvailable - Mark that the specified stack slot is available in the
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/// specified physreg. If CanClobber is true, the physreg can be modified at
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/// any time without changing the semantics of the program.
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void addAvailable(int Slot, unsigned Reg, bool CanClobber = true) {
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// If this stack slot is thought to be available in some other physreg,
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// remove its record.
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ModifyStackSlot(Slot);
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PhysRegsAvailable.insert(std::make_pair(Reg, Slot));
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SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber;
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DEBUG(std::cerr << "Remembering SS#" << Slot << " in physreg "
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<< MRI->getName(Reg) << "\n");
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}
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/// canClobberPhysReg - Return true if the spiller is allowed to change the
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/// value of the specified stackslot register if it desires. The specified
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/// stack slot must be available in a physreg for this query to make sense.
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bool canClobberPhysReg(int Slot) const {
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assert(SpillSlotsAvailable.count(Slot) && "Slot not available!");
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return SpillSlotsAvailable.find(Slot)->second & 1;
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}
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/// ClobberPhysReg - This is called when the specified physreg changes
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/// value. We use this to invalidate any info about stuff we thing lives in
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/// it and any of its aliases.
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void ClobberPhysReg(unsigned PhysReg);
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/// ModifyStackSlot - This method is called when the value in a stack slot
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/// changes. This removes information about which register the previous value
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/// for this slot lives in (as the previous value is dead now).
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void ModifyStackSlot(int Slot);
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};
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}
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/// ClobberPhysRegOnly - This is called when the specified physreg changes
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/// value. We use this to invalidate any info about stuff we thing lives in it.
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void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
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std::multimap<unsigned, int>::iterator I =
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PhysRegsAvailable.lower_bound(PhysReg);
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while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
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int Slot = I->second;
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PhysRegsAvailable.erase(I++);
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assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg &&
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"Bidirectional map mismatch!");
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SpillSlotsAvailable.erase(Slot);
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DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg)
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<< " clobbered, invalidating SS#" << Slot << "\n");
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}
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}
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/// ClobberPhysReg - This is called when the specified physreg changes
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/// value. We use this to invalidate any info about stuff we thing lives in
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/// it and any of its aliases.
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void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
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for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
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ClobberPhysRegOnly(*AS);
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ClobberPhysRegOnly(PhysReg);
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}
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/// ModifyStackSlot - This method is called when the value in a stack slot
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/// changes. This removes information about which register the previous value
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/// for this slot lives in (as the previous value is dead now).
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void AvailableSpills::ModifyStackSlot(int Slot) {
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std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(Slot);
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if (It == SpillSlotsAvailable.end()) return;
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unsigned Reg = It->second >> 1;
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SpillSlotsAvailable.erase(It);
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// This register may hold the value of multiple stack slots, only remove this
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// stack slot from the set of values the register contains.
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std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
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for (; ; ++I) {
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assert(I != PhysRegsAvailable.end() && I->first == Reg &&
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"Map inverse broken!");
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if (I->second == Slot) break;
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}
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PhysRegsAvailable.erase(I);
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}
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// ReusedOp - For each reused operand, we keep track of a bit of information, in
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// case we need to rollback upon processing a new operand. See comments below.
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namespace {
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struct ReusedOp {
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// The MachineInstr operand that reused an available value.
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unsigned Operand;
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// StackSlot - The spill slot of the value being reused.
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unsigned StackSlot;
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// PhysRegReused - The physical register the value was available in.
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unsigned PhysRegReused;
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// AssignedPhysReg - The physreg that was assigned for use by the reload.
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unsigned AssignedPhysReg;
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// VirtReg - The virtual register itself.
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unsigned VirtReg;
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ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
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unsigned vreg)
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: Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr),
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VirtReg(vreg) {}
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};
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/// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
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/// is reused instead of reloaded.
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class VISIBILITY_HIDDEN ReuseInfo {
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MachineInstr &MI;
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std::vector<ReusedOp> Reuses;
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public:
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ReuseInfo(MachineInstr &mi) : MI(mi) {}
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bool hasReuses() const {
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return !Reuses.empty();
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}
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/// addReuse - If we choose to reuse a virtual register that is already
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/// available instead of reloading it, remember that we did so.
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void addReuse(unsigned OpNo, unsigned StackSlot,
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unsigned PhysRegReused, unsigned AssignedPhysReg,
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unsigned VirtReg) {
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// If the reload is to the assigned register anyway, no undo will be
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// required.
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if (PhysRegReused == AssignedPhysReg) return;
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// Otherwise, remember this.
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Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused,
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AssignedPhysReg, VirtReg));
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}
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/// GetRegForReload - We are about to emit a reload into PhysReg. If there
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/// is some other operand that is using the specified register, either pick
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/// a new register to use, or evict the previous reload and use this reg.
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unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
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AvailableSpills &Spills,
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std::map<int, MachineInstr*> &MaybeDeadStores) {
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if (Reuses.empty()) return PhysReg; // This is most often empty.
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for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
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ReusedOp &Op = Reuses[ro];
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// If we find some other reuse that was supposed to use this register
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// exactly for its reload, we can change this reload to use ITS reload
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// register.
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if (Op.PhysRegReused == PhysReg) {
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// Yup, use the reload register that we didn't use before.
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unsigned NewReg = Op.AssignedPhysReg;
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// Remove the record for the previous reuse. We know it can never be
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// invalidated now.
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Reuses.erase(Reuses.begin()+ro);
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return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores);
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} else {
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// Otherwise, we might also have a problem if a previously reused
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// value aliases the new register. If so, codegen the previous reload
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// and use this one.
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unsigned PRRU = Op.PhysRegReused;
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const MRegisterInfo *MRI = Spills.getRegInfo();
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if (MRI->areAliases(PRRU, PhysReg)) {
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// Okay, we found out that an alias of a reused register
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// was used. This isn't good because it means we have
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// to undo a previous reuse.
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MachineBasicBlock *MBB = MI->getParent();
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const TargetRegisterClass *AliasRC =
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MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
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// Copy Op out of the vector and remove it, we're going to insert an
|
|
// explicit load for it.
|
|
ReusedOp NewOp = Op;
|
|
Reuses.erase(Reuses.begin()+ro);
|
|
|
|
// Ok, we're going to try to reload the assigned physreg into the
|
|
// slot that we were supposed to in the first place. However, that
|
|
// register could hold a reuse. Check to see if it conflicts or
|
|
// would prefer us to use a different register.
|
|
unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
|
|
MI, Spills, MaybeDeadStores);
|
|
|
|
MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
|
|
NewOp.StackSlot, AliasRC);
|
|
Spills.ClobberPhysReg(NewPhysReg);
|
|
Spills.ClobberPhysReg(NewOp.PhysRegReused);
|
|
|
|
// Any stores to this stack slot are not dead anymore.
|
|
MaybeDeadStores.erase(NewOp.StackSlot);
|
|
|
|
MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
|
|
|
|
Spills.addAvailable(NewOp.StackSlot, NewPhysReg);
|
|
++NumLoads;
|
|
DEBUG(MachineBasicBlock::iterator MII = MI;
|
|
std::cerr << '\t' << *prior(MII));
|
|
|
|
DEBUG(std::cerr << "Reuse undone!\n");
|
|
--NumReused;
|
|
|
|
// Finally, PhysReg is now available, go ahead and use it.
|
|
return PhysReg;
|
|
}
|
|
}
|
|
}
|
|
return PhysReg;
|
|
}
|
|
};
|
|
}
|
|
|
|
|
|
/// rewriteMBB - Keep track of which spills are available even after the
|
|
/// register allocator is done with them. If possible, avoid reloading vregs.
|
|
void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
|
|
|
|
DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n");
|
|
|
|
// Spills - Keep track of which spilled values are available in physregs so
|
|
// that we can choose to reuse the physregs instead of emitting reloads.
|
|
AvailableSpills Spills(MRI, TII);
|
|
|
|
// DefAndUseVReg - When we see a def&use operand that is spilled, keep track
|
|
// of it. ".first" is the machine operand index (should always be 0 for now),
|
|
// and ".second" is the virtual register that is spilled.
|
|
std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg;
|
|
|
|
// MaybeDeadStores - When we need to write a value back into a stack slot,
|
|
// keep track of the inserted store. If the stack slot value is never read
|
|
// (because the value was used from some available register, for example), and
|
|
// subsequently stored to, the original store is dead. This map keeps track
|
|
// of inserted stores that are not used. If we see a subsequent store to the
|
|
// same stack slot, the original store is deleted.
|
|
std::map<int, MachineInstr*> MaybeDeadStores;
|
|
|
|
bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs();
|
|
|
|
for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
|
|
MII != E; ) {
|
|
MachineInstr &MI = *MII;
|
|
MachineBasicBlock::iterator NextMII = MII; ++NextMII;
|
|
|
|
/// ReusedOperands - Keep track of operand reuse in case we need to undo
|
|
/// reuse.
|
|
ReuseInfo ReusedOperands(MI);
|
|
|
|
DefAndUseVReg.clear();
|
|
|
|
// Process all of the spilled uses and all non spilled reg references.
|
|
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
|
|
MachineOperand &MO = MI.getOperand(i);
|
|
if (!MO.isRegister() || MO.getReg() == 0)
|
|
continue; // Ignore non-register operands.
|
|
|
|
if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
|
|
// Ignore physregs for spilling, but remember that it is used by this
|
|
// function.
|
|
PhysRegsUsed[MO.getReg()] = true;
|
|
continue;
|
|
}
|
|
|
|
assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
|
|
"Not a virtual or a physical register?");
|
|
|
|
unsigned VirtReg = MO.getReg();
|
|
if (!VRM.hasStackSlot(VirtReg)) {
|
|
// This virtual register was assigned a physreg!
|
|
unsigned Phys = VRM.getPhys(VirtReg);
|
|
PhysRegsUsed[Phys] = true;
|
|
MI.getOperand(i).setReg(Phys);
|
|
continue;
|
|
}
|
|
|
|
// This virtual register is now known to be a spilled value.
|
|
if (!MO.isUse())
|
|
continue; // Handle defs in the loop below (handle use&def here though)
|
|
|
|
// If this is both a def and a use, we need to emit a store to the
|
|
// stack slot after the instruction. Keep track of D&U operands
|
|
// because we are about to change it to a physreg here.
|
|
if (MO.isDef()) {
|
|
// Remember that this was a def-and-use operand, and that the
|
|
// stack slot is live after this instruction executes.
|
|
DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
|
|
}
|
|
|
|
int StackSlot = VRM.getStackSlot(VirtReg);
|
|
unsigned PhysReg;
|
|
|
|
// Check to see if this stack slot is available.
|
|
if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) {
|
|
|
|
// Don't reuse it for a def&use operand if we aren't allowed to change
|
|
// the physreg!
|
|
if (!MO.isDef() || Spills.canClobberPhysReg(StackSlot)) {
|
|
// If this stack slot value is already available, reuse it!
|
|
DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
|
|
<< MRI->getName(PhysReg) << " for vreg"
|
|
<< VirtReg <<" instead of reloading into physreg "
|
|
<< MRI->getName(VRM.getPhys(VirtReg)) << "\n");
|
|
MI.getOperand(i).setReg(PhysReg);
|
|
|
|
// The only technical detail we have is that we don't know that
|
|
// PhysReg won't be clobbered by a reloaded stack slot that occurs
|
|
// later in the instruction. In particular, consider 'op V1, V2'.
|
|
// If V1 is available in physreg R0, we would choose to reuse it
|
|
// here, instead of reloading it into the register the allocator
|
|
// indicated (say R1). However, V2 might have to be reloaded
|
|
// later, and it might indicate that it needs to live in R0. When
|
|
// this occurs, we need to have information available that
|
|
// indicates it is safe to use R1 for the reload instead of R0.
|
|
//
|
|
// To further complicate matters, we might conflict with an alias,
|
|
// or R0 and R1 might not be compatible with each other. In this
|
|
// case, we actually insert a reload for V1 in R1, ensuring that
|
|
// we can get at R0 or its alias.
|
|
ReusedOperands.addReuse(i, StackSlot, PhysReg,
|
|
VRM.getPhys(VirtReg), VirtReg);
|
|
++NumReused;
|
|
continue;
|
|
}
|
|
|
|
// Otherwise we have a situation where we have a two-address instruction
|
|
// whose mod/ref operand needs to be reloaded. This reload is already
|
|
// available in some register "PhysReg", but if we used PhysReg as the
|
|
// operand to our 2-addr instruction, the instruction would modify
|
|
// PhysReg. This isn't cool if something later uses PhysReg and expects
|
|
// to get its initial value.
|
|
//
|
|
// To avoid this problem, and to avoid doing a load right after a store,
|
|
// we emit a copy from PhysReg into the designated register for this
|
|
// operand.
|
|
unsigned DesignatedReg = VRM.getPhys(VirtReg);
|
|
assert(DesignatedReg && "Must map virtreg to physreg!");
|
|
|
|
// Note that, if we reused a register for a previous operand, the
|
|
// register we want to reload into might not actually be
|
|
// available. If this occurs, use the register indicated by the
|
|
// reuser.
|
|
if (ReusedOperands.hasReuses())
|
|
DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
|
|
Spills, MaybeDeadStores);
|
|
|
|
// If the mapped designated register is actually the physreg we have
|
|
// incoming, we don't need to inserted a dead copy.
|
|
if (DesignatedReg == PhysReg) {
|
|
// If this stack slot value is already available, reuse it!
|
|
DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
|
|
<< MRI->getName(PhysReg) << " for vreg"
|
|
<< VirtReg
|
|
<< " instead of reloading into same physreg.\n");
|
|
MI.getOperand(i).setReg(PhysReg);
|
|
++NumReused;
|
|
continue;
|
|
}
|
|
|
|
const TargetRegisterClass* RC =
|
|
MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
|
|
|
|
PhysRegsUsed[DesignatedReg] = true;
|
|
MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
|
|
|
|
// This invalidates DesignatedReg.
|
|
Spills.ClobberPhysReg(DesignatedReg);
|
|
|
|
Spills.addAvailable(StackSlot, DesignatedReg);
|
|
MI.getOperand(i).setReg(DesignatedReg);
|
|
DEBUG(std::cerr << '\t' << *prior(MII));
|
|
++NumReused;
|
|
continue;
|
|
}
|
|
|
|
// Otherwise, reload it and remember that we have it.
|
|
PhysReg = VRM.getPhys(VirtReg);
|
|
assert(PhysReg && "Must map virtreg to physreg!");
|
|
const TargetRegisterClass* RC =
|
|
MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
|
|
|
|
// Note that, if we reused a register for a previous operand, the
|
|
// register we want to reload into might not actually be
|
|
// available. If this occurs, use the register indicated by the
|
|
// reuser.
|
|
if (ReusedOperands.hasReuses())
|
|
PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
|
|
Spills, MaybeDeadStores);
|
|
|
|
PhysRegsUsed[PhysReg] = true;
|
|
MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
|
|
// This invalidates PhysReg.
|
|
Spills.ClobberPhysReg(PhysReg);
|
|
|
|
// Any stores to this stack slot are not dead anymore.
|
|
MaybeDeadStores.erase(StackSlot);
|
|
Spills.addAvailable(StackSlot, PhysReg);
|
|
++NumLoads;
|
|
MI.getOperand(i).setReg(PhysReg);
|
|
DEBUG(std::cerr << '\t' << *prior(MII));
|
|
}
|
|
|
|
// Loop over all of the implicit defs, clearing them from our available
|
|
// sets.
|
|
const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
|
|
if (ImpDef) {
|
|
for ( ; *ImpDef; ++ImpDef) {
|
|
PhysRegsUsed[*ImpDef] = true;
|
|
Spills.ClobberPhysReg(*ImpDef);
|
|
}
|
|
}
|
|
|
|
DEBUG(std::cerr << '\t' << MI);
|
|
|
|
// If we have folded references to memory operands, make sure we clear all
|
|
// physical registers that may contain the value of the spilled virtual
|
|
// register
|
|
VirtRegMap::MI2VirtMapTy::const_iterator I, End;
|
|
for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
|
|
DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: "
|
|
<< I->second.second);
|
|
unsigned VirtReg = I->second.first;
|
|
VirtRegMap::ModRef MR = I->second.second;
|
|
if (!VRM.hasStackSlot(VirtReg)) {
|
|
DEBUG(std::cerr << ": No stack slot!\n");
|
|
continue;
|
|
}
|
|
int SS = VRM.getStackSlot(VirtReg);
|
|
DEBUG(std::cerr << " - StackSlot: " << SS << "\n");
|
|
|
|
// If this folded instruction is just a use, check to see if it's a
|
|
// straight load from the virt reg slot.
|
|
if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
|
|
int FrameIdx;
|
|
if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
|
|
// If this spill slot is available, turn it into a copy (or nothing)
|
|
// instead of leaving it as a load!
|
|
unsigned InReg;
|
|
if (FrameIdx == SS && (InReg = Spills.getSpillSlotPhysReg(SS))) {
|
|
DEBUG(std::cerr << "Promoted Load To Copy: " << MI);
|
|
MachineFunction &MF = *MBB.getParent();
|
|
if (DestReg != InReg) {
|
|
MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
|
|
MF.getSSARegMap()->getRegClass(VirtReg));
|
|
// Revisit the copy so we make sure to notice the effects of the
|
|
// operation on the destreg (either needing to RA it if it's
|
|
// virtual or needing to clobber any values if it's physical).
|
|
NextMII = &MI;
|
|
--NextMII; // backtrack to the copy.
|
|
}
|
|
VRM.RemoveFromFoldedVirtMap(&MI);
|
|
MBB.erase(&MI);
|
|
goto ProcessNextInst;
|
|
}
|
|
}
|
|
}
|
|
|
|
// If this reference is not a use, any previous store is now dead.
|
|
// Otherwise, the store to this stack slot is not dead anymore.
|
|
std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
|
|
if (MDSI != MaybeDeadStores.end()) {
|
|
if (MR & VirtRegMap::isRef) // Previous store is not dead.
|
|
MaybeDeadStores.erase(MDSI);
|
|
else {
|
|
// If we get here, the store is dead, nuke it now.
|
|
assert(VirtRegMap::isMod && "Can't be modref!");
|
|
DEBUG(std::cerr << "Removed dead store:\t" << *MDSI->second);
|
|
MBB.erase(MDSI->second);
|
|
VRM.RemoveFromFoldedVirtMap(MDSI->second);
|
|
MaybeDeadStores.erase(MDSI);
|
|
++NumDSE;
|
|
}
|
|
}
|
|
|
|
// If the spill slot value is available, and this is a new definition of
|
|
// the value, the value is not available anymore.
|
|
if (MR & VirtRegMap::isMod) {
|
|
// Notice that the value in this stack slot has been modified.
|
|
Spills.ModifyStackSlot(SS);
|
|
|
|
// If this is *just* a mod of the value, check to see if this is just a
|
|
// store to the spill slot (i.e. the spill got merged into the copy). If
|
|
// so, realize that the vreg is available now, and add the store to the
|
|
// MaybeDeadStore info.
|
|
int StackSlot;
|
|
if (!(MR & VirtRegMap::isRef)) {
|
|
if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
|
|
assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
|
|
"Src hasn't been allocated yet?");
|
|
// Okay, this is certainly a store of SrcReg to [StackSlot]. Mark
|
|
// this as a potentially dead store in case there is a subsequent
|
|
// store into the stack slot without a read from it.
|
|
MaybeDeadStores[StackSlot] = &MI;
|
|
|
|
// If the stack slot value was previously available in some other
|
|
// register, change it now. Otherwise, make the register available,
|
|
// in PhysReg.
|
|
Spills.addAvailable(StackSlot, SrcReg, false /*don't clobber*/);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Process all of the spilled defs.
|
|
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
|
|
MachineOperand &MO = MI.getOperand(i);
|
|
if (MO.isRegister() && MO.getReg() && MO.isDef()) {
|
|
unsigned VirtReg = MO.getReg();
|
|
|
|
if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
|
|
// Check to see if this is a def-and-use vreg operand that we do need
|
|
// to insert a store for.
|
|
bool OpTakenCareOf = false;
|
|
if (MO.isUse() && !DefAndUseVReg.empty()) {
|
|
for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau)
|
|
if (DefAndUseVReg[dau].first == i) {
|
|
VirtReg = DefAndUseVReg[dau].second;
|
|
OpTakenCareOf = true;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!OpTakenCareOf) {
|
|
// Check to see if this is a noop copy. If so, eliminate the
|
|
// instruction before considering the dest reg to be changed.
|
|
unsigned Src, Dst;
|
|
if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
|
|
++NumDCE;
|
|
DEBUG(std::cerr << "Removing now-noop copy: " << MI);
|
|
MBB.erase(&MI);
|
|
VRM.RemoveFromFoldedVirtMap(&MI);
|
|
goto ProcessNextInst;
|
|
}
|
|
Spills.ClobberPhysReg(VirtReg);
|
|
continue;
|
|
}
|
|
}
|
|
|
|
// The only vregs left are stack slot definitions.
|
|
int StackSlot = VRM.getStackSlot(VirtReg);
|
|
const TargetRegisterClass *RC =
|
|
MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
|
|
unsigned PhysReg;
|
|
|
|
// If this is a def&use operand, and we used a different physreg for
|
|
// it than the one assigned, make sure to execute the store from the
|
|
// correct physical register.
|
|
if (MO.getReg() == VirtReg)
|
|
PhysReg = VRM.getPhys(VirtReg);
|
|
else
|
|
PhysReg = MO.getReg();
|
|
|
|
PhysRegsUsed[PhysReg] = true;
|
|
MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
|
|
DEBUG(std::cerr << "Store:\t" << *next(MII));
|
|
MI.getOperand(i).setReg(PhysReg);
|
|
|
|
// Check to see if this is a noop copy. If so, eliminate the
|
|
// instruction before considering the dest reg to be changed.
|
|
{
|
|
unsigned Src, Dst;
|
|
if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
|
|
++NumDCE;
|
|
DEBUG(std::cerr << "Removing now-noop copy: " << MI);
|
|
MBB.erase(&MI);
|
|
VRM.RemoveFromFoldedVirtMap(&MI);
|
|
goto ProcessNextInst;
|
|
}
|
|
}
|
|
|
|
// If there is a dead store to this stack slot, nuke it now.
|
|
MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
|
|
if (LastStore) {
|
|
DEBUG(std::cerr << "Removed dead store:\t" << *LastStore);
|
|
++NumDSE;
|
|
MBB.erase(LastStore);
|
|
VRM.RemoveFromFoldedVirtMap(LastStore);
|
|
}
|
|
LastStore = next(MII);
|
|
|
|
// If the stack slot value was previously available in some other
|
|
// register, change it now. Otherwise, make the register available,
|
|
// in PhysReg.
|
|
Spills.ModifyStackSlot(StackSlot);
|
|
Spills.ClobberPhysReg(PhysReg);
|
|
Spills.addAvailable(StackSlot, PhysReg);
|
|
++NumStores;
|
|
}
|
|
}
|
|
ProcessNextInst:
|
|
MII = NextMII;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
llvm::Spiller* llvm::createSpiller() {
|
|
switch (SpillerOpt) {
|
|
default: assert(0 && "Unreachable!");
|
|
case local:
|
|
return new LocalSpiller();
|
|
case simple:
|
|
return new SimpleSpiller();
|
|
}
|
|
}
|