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https://github.com/c64scene-ar/llvm-6502.git
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305228cc0b
This fixes it for SI. It also removes the pattern used previously for Evergreen for f32. I'm not sure if the the new R600 output is better or not, but it uses 1 fewer instructions if BFI is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226682 91177308-0d34-0410-b5e6-96231b3b80d8
67 lines
2.4 KiB
LLVM
67 lines
2.4 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}round_f32:
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; SI-DAG: s_load_dword [[SX:s[0-9]+]]
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; SI-DAG: v_mov_b32_e32 [[VX:v[0-9]+]], [[SX]]
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; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x7fffffff
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; SI: v_bfi_b32 [[COPYSIGN:v[0-9]+]], [[K]], 1.0, [[VX]]
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; SI: v_trunc_f32_e32 [[TRUNC:v[0-9]+]], [[SX]]
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; SI: v_sub_f32_e32 [[SUB:v[0-9]+]], [[SX]], [[TRUNC]]
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; SI: v_cmp_ge_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], |[[SUB]]|, 0.5
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; SI: v_cndmask_b32_e64 [[SEL:v[0-9]+]], 0, [[VX]], [[CMP]]
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; SI: v_add_f32_e32 [[RESULT:v[0-9]+]], [[SEL]], [[TRUNC]]
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; SI: buffer_store_dword [[RESULT]]
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; R600: TRUNC {{.*}}, [[ARG:KC[0-9]\[[0-9]+\]\.[XYZW]]]
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; R600-DAG: ADD {{.*}},
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; R600-DAG: BFI_INT
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; R600-DAG: SETGE
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; R600-DAG: CNDE
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; R600-DAG: ADD
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define void @round_f32(float addrspace(1)* %out, float %x) #0 {
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%result = call float @llvm.round.f32(float %x) #1
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store float %result, float addrspace(1)* %out
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ret void
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}
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; The vector tests are really difficult to verify, since it can be hard to
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; predict how the scheduler will order the instructions. We already have
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; a test for the scalar case, so the vector tests just check that the
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; compiler doesn't crash.
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; FUNC-LABEL: {{^}}round_v2f32:
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; SI: s_endpgm
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; R600: CF_END
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define void @round_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) #0 {
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%result = call <2 x float> @llvm.round.v2f32(<2 x float> %in) #1
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store <2 x float> %result, <2 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}round_v4f32:
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; SI: s_endpgm
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; R600: CF_END
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define void @round_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) #0 {
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%result = call <4 x float> @llvm.round.v4f32(<4 x float> %in) #1
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store <4 x float> %result, <4 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}round_v8f32:
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; SI: s_endpgm
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; R600: CF_END
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define void @round_v8f32(<8 x float> addrspace(1)* %out, <8 x float> %in) #0 {
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%result = call <8 x float> @llvm.round.v8f32(<8 x float> %in) #1
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store <8 x float> %result, <8 x float> addrspace(1)* %out
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ret void
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}
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declare float @llvm.round.f32(float) #1
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declare <2 x float> @llvm.round.v2f32(<2 x float>) #1
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declare <4 x float> @llvm.round.v4f32(<4 x float>) #1
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declare <8 x float> @llvm.round.v8f32(<8 x float>) #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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