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https://github.com/c64scene-ar/llvm-6502.git
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8c4cf40507
We should update the usages to all of the results;
otherwise, we might get assertion failure or SEGV during
the type legalization of ATOMIC_CMP_SWAP_WITH_SUCCESS
with two or more illegal types.
For example, in the following sequence, both i8 and i1
might be illegal in some target, e.g. armv5, mipsel, mips64el,
%0 = cmpxchg i8* %ptr, i8 %desire, i8 %new monotonic monotonic
%1 = extractvalue { i8, i1 } %0, 1
Since both i8 and i1 should be legalized, the corresponding
ATOMIC_CMP_SWAP_WITH_SUCCESS dag will be checked/replaced/updated
twice.
If we don't update the usage to *ALL* of the results in the
first round, the DAG for extractvalue might be processed earlier.
The GetPromotedInteger() will result in assertion failure,
because its operand (i.e. the success bit of cmpxchg) is not
promoted beforehand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213569 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.8 KiB
LLVM
51 lines
1.8 KiB
LLVM
; RUN: llc < %s -mtriple=arm-linux-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-ARM
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; RUN: llc < %s -mtriple=thumb-linux-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-THUMB
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-ARMV7
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; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-THUMBV7
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define zeroext i1 @test_cmpxchg_res_i8(i8* %addr, i8 %desired, i8 zeroext %new) {
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entry:
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%0 = cmpxchg i8* %addr, i8 %desired, i8 %new monotonic monotonic
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%1 = extractvalue { i8, i1 } %0, 1
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ret i1 %1
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}
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; CHECK-ARM-LABEL: test_cmpxchg_res_i8
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; CHECK-ARM: bl __sync_val_compare_and_swap_1
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; CHECK-ARM: mov [[REG:r[0-9]+]], #0
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; CHECK-ARM: cmp r0, {{r[0-9]+}}
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; CHECK-ARM: moveq [[REG]], #1
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; CHECK-ARM: mov r0, [[REG]]
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; CHECK-THUMB-LABEL: test_cmpxchg_res_i8
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; CHECK-THUMB: bl __sync_val_compare_and_swap_1
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; CHECK-THUMB: mov [[R1:r[0-9]+]], r0
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; CHECK-THUMB: movs r0, #1
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; CHECK-THUMB: movs [[R2:r[0-9]+]], #0
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; CHECK-THUMB: cmp [[R1]], {{r[0-9]+}}
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; CHECK-THU<B: beq
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; CHECK-THUMB: mov r0, [[R2]]
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; CHECK-ARMV7-LABEL: test_cmpxchg_res_i8
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; CHECK-ARMV7: ldrexb [[R3:r[0-9]+]], [r0]
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; CHECK-ARMV7: mov [[R1:r[0-9]+]], #0
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; CHECK-ARMV7: cmp [[R3]], {{r[0-9]+}}
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; CHECK-ARMV7: bne
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; CHECK-ARMV7: strexb [[R3]], {{r[0-9]+}}, [{{r[0-9]+}}]
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; CHECK-ARMV7: mov [[R1]], #1
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; CHECK-ARMV7: cmp [[R3]], #0
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; CHECK-ARMV7: bne
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; CHECK-ARMV7: mov r0, [[R1]]
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; CHECK-THUMBV7-LABEL: test_cmpxchg_res_i8
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; CHECK-THUMBV7: ldrexb [[R3:r[0-9]+]], [r0]
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; CHECK-THUMBV7: cmp [[R3]], {{r[0-9]+}}
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; CHECK-THUMBV7: movne r0, #0
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; CHECK-THUMBV7: bxne lr
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; CHECK-THUMBV7: strexb [[R3]], {{r[0-9]+}}, [{{r[0-9]+}}]
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; CHECK-THUMBV7: cmp [[R3]], #0
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; CHECK-THUMBV7: itt eq
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; CHECK-THUMBV7: moveq r0, #1
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; CHECK-THUMBV7: bxeq lr
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