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https://github.com/c64scene-ar/llvm-6502.git
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a6425604c2
insertions. The old behavior could cause arbitrarily bad memory usage in the DAG combiner if there was heavy traffic of adding nodes already on the worklist to it. This commit switches the DAG combine worklist to work the same way as the instcombine worklist where we null-out removed entries and only add new entries to the worklist. My measurements of codegen time shows slight improvement. The memory utilization is unsurprisingly dominated by other factors (the IR and DAG itself I suspect). This change results in subtle, frustrating churn in the particular order in which DAG combines are applied which causes a number of minor regressions where we fail to match a pattern previously matched by accident. AFAICT, all of these should be using AddToWorklist to directly or should be written in a less brittle way. None of the changes seem drastically bad, and a few of the changes seem distinctly better. A major change required to make this work is to significantly harden the way in which the DAG combiner handle nodes which become dead (zero-uses). Previously, we relied on the ability to "priority-bump" them on the combine worklist to achieve recursive deletion of these nodes and ensure that the frontier of remaining live nodes all were added to the worklist. Instead, I've introduced a routine to just implement that precise logic with no indirection. It is a significantly simpler operation than that of the combiner worklist proper. I suspect this will also fix some other problems with the combiner. I think the x86 changes are really minor and uninteresting, but the avx512 change at least is hiding a "regression" (despite the test case being just noise, not testing some performance invariant) that might be looked into. Not sure if any of the others impact specific "important" code paths, but they didn't look terribly interesting to me, or the changes were really minor. The consensus in review is to fix any regressions that show up after the fact here. Thanks to the other reviewers for checking the output on other architectures. There is a specific regression on ARM that Tim already has a fix prepped to commit. Differential Revision: http://reviews.llvm.org/D4616 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213727 91177308-0d34-0410-b5e6-96231b3b80d8
219 lines
6.1 KiB
LLVM
219 lines
6.1 KiB
LLVM
; RUN: llc -mtriple=thumbv7-apple-none-macho < %s | FileCheck %s
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; RUN: llc -mtriple=thumbv6m-apple-none-macho -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-T1
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; RUN: llc -mtriple=thumbv7-apple-darwin-ios -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-IOS
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; RUN: llc -mtriple=thumbv7--linux-gnueabi -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-LINUX
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declare void @bar(i8*)
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%bigVec = type [2 x double]
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@var = global %bigVec zeroinitializer
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define void @check_simple() minsize {
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; CHECK-LABEL: check_simple:
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; CHECK: push.w {r7, r8, r9, r10, r11, lr}
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; CHECK-NOT: sub sp, sp,
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; ...
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; CHECK-NOT: add sp, sp,
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; CHECK: pop.w {r0, r1, r2, r3, r11, pc}
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; CHECK-T1-LABEL: check_simple:
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; CHECK-T1: push {r3, r4, r5, r6, r7, lr}
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; CHECK-T1: add r7, sp, #16
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; CHECK-T1-NOT: sub sp, sp,
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; ...
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; CHECK-T1-NOT: add sp, sp,
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; CHECK-T1: pop {r0, r1, r2, r3, r7, pc}
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; iOS always has a frame pointer and messing with the push affects
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; how it's set in the prologue. Make sure we get that right.
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; CHECK-IOS-LABEL: check_simple:
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; CHECK-IOS: push {r3, r4, r5, r6, r7, lr}
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; CHECK-NOT: sub sp,
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; CHECK-IOS: add r7, sp, #16
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; CHECK-NOT: sub sp,
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; ...
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; CHECK-NOT: add sp,
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; CHEC: pop {r3, r4, r5, r6, r7, pc}
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%var = alloca i8, i32 16
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call void @bar(i8* %var)
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ret void
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}
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define void @check_simple_too_big() minsize {
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; CHECK-LABEL: check_simple_too_big:
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; CHECK: push.w {r11, lr}
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; CHECK: sub sp,
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; ...
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; CHECK: add sp,
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; CHECK: pop.w {r11, pc}
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%var = alloca i8, i32 64
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call void @bar(i8* %var)
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ret void
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}
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define void @check_vfp_fold() minsize {
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; CHECK-LABEL: check_vfp_fold:
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; CHECK: push {r[[GLOBREG:[0-9]+]], lr}
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; CHECK: vpush {d6, d7, d8, d9}
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; CHECK-NOT: sub sp,
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; ...
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; CHECK: vldmia r[[GLOBREG]], {d8, d9}
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; ...
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; CHECK-NOT: add sp,
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; CHECK: vpop {d6, d7, d8, d9}
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; CHECKL pop {r[[GLOBREG]], pc}
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; iOS uses aligned NEON stores here, which is convenient since we
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; want to make sure that works too.
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; CHECK-IOS-LABEL: check_vfp_fold:
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; CHECK-IOS: push {r0, r1, r2, r3, r4, r7, lr}
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; CHECK-IOS: sub.w r4, sp, #16
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; CHECK-IOS: bic r4, r4, #15
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; CHECK-IOS: mov sp, r4
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; CHECK-IOS: vst1.64 {d8, d9}, [r4:128]
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; ...
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; CHECK-IOS: add r4, sp, #16
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; CHECK-IOS: vld1.64 {d8, d9}, [r4:128]
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; CHECK-IOS: mov sp, r4
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; CHECK-IOS: pop {r4, r7, pc}
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%var = alloca i8, i32 16
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%tmp = load %bigVec* @var
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call void @bar(i8* %var)
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store %bigVec %tmp, %bigVec* @var
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ret void
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}
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; This function should use just enough space that the "add sp, sp, ..." could be
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; folded in except that doing so would clobber the value being returned.
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define i64 @check_no_return_clobber() minsize {
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; CHECK-LABEL: check_no_return_clobber:
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; CHECK: push.w {r5, r6, r7, r8, r9, r10, r11, lr}
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; CHECK-NOT: sub sp,
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; ...
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; CHECK: add sp, #24
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; CHECK: pop.w {r11, pc}
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; Just to keep iOS FileCheck within previous function:
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; CHECK-IOS-LABEL: check_no_return_clobber:
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%var = alloca i8, i32 20
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call void @bar(i8* %var)
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ret i64 0
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}
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define arm_aapcs_vfpcc double @check_vfp_no_return_clobber() minsize {
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; CHECK-LABEL: check_vfp_no_return_clobber:
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; CHECK: push {r[[GLOBREG:[0-9]+]], lr}
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; CHECK: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8, d9}
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; CHECK-NOT: sub sp,
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; ...
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; CHECK: add sp, #64
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; CHECK: vpop {d8, d9}
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; CHECK: pop {r[[GLOBREG]], pc}
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%var = alloca i8, i32 64
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%tmp = load %bigVec* @var
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call void @bar(i8* %var)
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store %bigVec %tmp, %bigVec* @var
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ret double 1.0
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}
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@dbl = global double 0.0
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; PR18136: there was a bug determining where the first eligible pop in a
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; basic-block was when the entire block was epilogue code.
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define void @test_fold_point(i1 %tst) minsize {
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; CHECK-LABEL: test_fold_point:
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; Important to check for beginning of basic block, because if it gets
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; if-converted the test is probably no longer checking what it should.
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; CHECK: {{LBB[0-9]+_2}}:
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; CHECK-NEXT: vpop {d7, d8}
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; CHECK-NEXT: pop {r4, pc}
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; With a guaranteed frame-pointer, we want to make sure that its offset in the
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; push block is correct, even if a few registers have been tacked onto a later
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; vpush (PR18160).
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; CHECK-IOS-LABEL: test_fold_point:
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; CHECK-IOS: push {r4, r7, lr}
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; CHECK-IOS-NEXT: add r7, sp, #4
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; CHECK-IOS-NEXT: vpush {d7, d8}
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; We want some memory so there's a stack adjustment to fold...
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%var = alloca i8, i32 8
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; We want a long-lived floating register so that a callee-saved dN is used and
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; there's both a vpop and a pop.
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%live_val = load double* @dbl
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br i1 %tst, label %true, label %end
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true:
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call void @bar(i8* %var)
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store double %live_val, double* @dbl
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br label %end
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end:
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; We want the epilogue to be the only thing in a basic block so that we hit
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; the correct edge-case (first inst in block is correct one to adjust).
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ret void
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}
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define void @test_varsize(...) minsize {
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; CHECK-T1-LABEL: test_varsize:
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; CHECK-T1: sub sp, #16
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; CHECK-T1: push {r5, r6, r7, lr}
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; ...
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; CHECK-T1: pop {r2, r3, r7}
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; CHECK-T1: pop {r3}
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; CHECK-T1: add sp, #16
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; CHECK-T1: bx r3
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; CHECK-LABEL: test_varsize:
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; CHECK: sub sp, #16
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; CHECK: push.w {r9, r10, r11, lr}
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; ...
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; CHECK: pop.w {r2, r3, r11, lr}
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; CHECK: add sp, #16
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; CHECK: bx lr
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%var = alloca i8, i32 8
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call void @bar(i8* %var)
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ret void
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}
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%"MyClass" = type { i8*, i32, i32, float, float, float, [2 x i8], i32, i32* }
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declare float @foo()
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declare void @bar3()
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declare %"MyClass"* @bar2(%"MyClass"* returned, i16*, i32, float, float, i32, i32, i1 zeroext, i1 zeroext, i32)
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define fastcc float @check_vfp_no_return_clobber2(i16* %r, i16* %chars, i32 %length, i1 zeroext %flag) minsize {
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entry:
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; CHECK-LINUX-LABEL: check_vfp_no_return_clobber2
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; CHECK-LINUX: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8}
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; CHECK-NOT: sub sp,
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; ...
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; CHECK-LINUX: add sp
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; CHECK-LINUX: vpop {d8}
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%run = alloca %"MyClass", align 4
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%call = call %"MyClass"* @bar2(%"MyClass"* %run, i16* %chars, i32 %length, float 0.000000e+00, float 0.000000e+00, i32 1, i32 1, i1 zeroext false, i1 zeroext true, i32 3)
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%call1 = call float @foo()
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%cmp = icmp eq %"MyClass"* %run, null
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br i1 %cmp, label %exit, label %if.then
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if.then: ; preds = %entry
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call void @bar3()
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br label %exit
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exit: ; preds = %if.then, %entry
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ret float %call1
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}
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