mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-01 15:33:33 +00:00
0163356ad1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188534 91177308-0d34-0410-b5e6-96231b3b80d8
108 lines
3.6 KiB
LLVM
108 lines
3.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
|
|
; CHECK: LCP
|
|
; CHECK: .long 2
|
|
; CHECK: .long 5
|
|
; CHECK: .long 0
|
|
; CHECK: .long 0
|
|
; CHECK: .long 7
|
|
; CHECK: .long 0
|
|
; CHECK: .long 10
|
|
; CHECK: .long 1
|
|
; CHECK: .long 0
|
|
; CHECK: .long 5
|
|
; CHECK: .long 0
|
|
; CHECK: .long 4
|
|
; CHECK: .long 7
|
|
; CHECK: .long 0
|
|
; CHECK: .long 10
|
|
; CHECK: .long 1
|
|
; CHECK: test1:
|
|
; CHECK: vpermps
|
|
; CHECK: ret
|
|
define <16 x float> @test1(<16 x float> %a) nounwind {
|
|
%c = shufflevector <16 x float> %a, <16 x float> undef, <16 x i32> <i32 2, i32 5, i32 undef, i32 undef, i32 7, i32 undef, i32 10, i32 1, i32 0, i32 5, i32 undef, i32 4, i32 7, i32 undef, i32 10, i32 1>
|
|
ret <16 x float> %c
|
|
}
|
|
|
|
; CHECK: test2:
|
|
; CHECK: vpermd
|
|
; CHECK: ret
|
|
define <16 x i32> @test2(<16 x i32> %a) nounwind {
|
|
%c = shufflevector <16 x i32> %a, <16 x i32> undef, <16 x i32> <i32 2, i32 5, i32 undef, i32 undef, i32 7, i32 undef, i32 10, i32 1, i32 0, i32 5, i32 undef, i32 4, i32 7, i32 undef, i32 10, i32 1>
|
|
ret <16 x i32> %c
|
|
}
|
|
|
|
; CHECK: test3:
|
|
; CHECK: vpermq
|
|
; CHECK: ret
|
|
define <8 x i64> @test3(<8 x i64> %a) nounwind {
|
|
%c = shufflevector <8 x i64> %a, <8 x i64> undef, <8 x i32> <i32 2, i32 5, i32 1, i32 undef, i32 7, i32 undef, i32 3, i32 1>
|
|
ret <8 x i64> %c
|
|
}
|
|
|
|
; CHECK: test4:
|
|
; CHECK: vpermpd
|
|
; CHECK: ret
|
|
define <8 x double> @test4(<8 x double> %a) nounwind {
|
|
%c = shufflevector <8 x double> %a, <8 x double> undef, <8 x i32> <i32 1, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
ret <8 x double> %c
|
|
}
|
|
|
|
; CHECK: test5:
|
|
; CHECK: vpermi2pd
|
|
; CHECK: ret
|
|
define <8 x double> @test5(<8 x double> %a, <8 x double> %b) nounwind {
|
|
%c = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 2, i32 8, i32 0, i32 1, i32 6, i32 10, i32 4, i32 5>
|
|
ret <8 x double> %c
|
|
}
|
|
|
|
; CHECK: test6:
|
|
; CHECK: vpermq $30
|
|
; CHECK: ret
|
|
define <8 x i64> @test6(<8 x i64> %a) nounwind {
|
|
%c = shufflevector <8 x i64> %a, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 1, i32 0, i32 6, i32 7, i32 5, i32 4>
|
|
ret <8 x i64> %c
|
|
}
|
|
|
|
; CHECK: test7:
|
|
; CHECK: vpermi2q
|
|
; CHECK: ret
|
|
define <8 x i64> @test7(<8 x i64> %a, <8 x i64> %b) nounwind {
|
|
%c = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 2, i32 8, i32 0, i32 1, i32 6, i32 10, i32 4, i32 5>
|
|
ret <8 x i64> %c
|
|
}
|
|
|
|
; CHECK: test8:
|
|
; CHECK: vpermi2d
|
|
; CHECK: ret
|
|
define <16 x i32> @test8(<16 x i32> %a, <16 x i32> %b) nounwind {
|
|
%c = shufflevector <16 x i32> %a, <16 x i32> %b, <16 x i32> <i32 15, i32 31, i32 14, i32 22, i32 13, i32 29, i32 4, i32 28, i32 11, i32 27, i32 10, i32 26, i32 9, i32 25, i32 8, i32 24>
|
|
ret <16 x i32> %c
|
|
}
|
|
|
|
; CHECK: test9:
|
|
; CHECK: vpermi2ps
|
|
; CHECK: ret
|
|
define <16 x float> @test9(<16 x float> %a, <16 x float> %b) nounwind {
|
|
%c = shufflevector <16 x float> %a, <16 x float> %b, <16 x i32> <i32 15, i32 31, i32 14, i32 22, i32 13, i32 29, i32 4, i32 28, i32 11, i32 27, i32 10, i32 26, i32 9, i32 25, i32 8, i32 24>
|
|
ret <16 x float> %c
|
|
}
|
|
|
|
; CHECK: test10:
|
|
; CHECK: vpermi2ps (
|
|
; CHECK: ret
|
|
define <16 x float> @test10(<16 x float> %a, <16 x float>* %b) nounwind {
|
|
%c = load <16 x float>* %b
|
|
%d = shufflevector <16 x float> %a, <16 x float> %c, <16 x i32> <i32 15, i32 31, i32 14, i32 22, i32 13, i32 29, i32 4, i32 28, i32 11, i32 27, i32 10, i32 26, i32 9, i32 25, i32 8, i32 24>
|
|
ret <16 x float> %d
|
|
}
|
|
|
|
; CHECK: test11:
|
|
; CHECK: vpermi2d (
|
|
; CHECK: ret
|
|
define <16 x i32> @test11(<16 x i32> %a, <16 x i32>* %b) nounwind {
|
|
%c = load <16 x i32>* %b
|
|
%d = shufflevector <16 x i32> %a, <16 x i32> %c, <16 x i32> <i32 15, i32 31, i32 14, i32 22, i32 13, i32 29, i32 4, i32 28, i32 11, i32 27, i32 10, i32 26, i32 9, i32 25, i32 8, i32 24>
|
|
ret <16 x i32> %d
|
|
}
|