mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 04:30:23 +00:00
7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1006 B
LLVM
41 lines
1006 B
LLVM
; RUN: llc < %s -march=arm64
|
|
|
|
; The target lowering for integer comparisons was replacing some DAG nodes
|
|
; during operation legalization, which resulted in dangling pointers,
|
|
; cycles in DAGs, and eventually crashes. This is the testcase for
|
|
; one of those crashes. (rdar://10653656)
|
|
|
|
define void @test(i1 zeroext %IsArrow) nounwind ssp align 2 {
|
|
entry:
|
|
br i1 undef, label %return, label %lor.lhs.false
|
|
|
|
lor.lhs.false:
|
|
br i1 undef, label %return, label %if.end
|
|
|
|
if.end:
|
|
%tmp.i = load i64* undef, align 8
|
|
%and.i.i.i = and i64 %tmp.i, -16
|
|
br i1 %IsArrow, label %if.else_crit_edge, label %if.end32
|
|
|
|
if.else_crit_edge:
|
|
br i1 undef, label %if.end32, label %return
|
|
|
|
if.end32:
|
|
%0 = icmp ult i32 undef, 3
|
|
%1 = zext i64 %tmp.i to i320
|
|
%.pn.v = select i1 %0, i320 128, i320 64
|
|
%.pn = shl i320 %1, %.pn.v
|
|
%ins346392 = or i320 %.pn, 0
|
|
store i320 %ins346392, i320* undef, align 8
|
|
br i1 undef, label %sw.bb.i.i, label %exit
|
|
|
|
sw.bb.i.i:
|
|
unreachable
|
|
|
|
exit:
|
|
unreachable
|
|
|
|
return:
|
|
ret void
|
|
}
|