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09712b57ce
instruction. Added the 64-bit version "jrcxz" so it is recognized and also added the checks for incorrect uses of "jcxz" in 64-bit mode and "jrcxz" in 32-bit mode. Still to do is to correctly handle the encoding of the instruction adding the Address-size override prefix byte, 0x67, when the width of the count register is not the same as the mode the machine is running in. Which for example means the encoding of "jecxz" depends if you are assembling as a 32-bit target or a 64-bit target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105661 91177308-0d34-0410-b5e6-96231b3b80d8 |
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